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Searched refs:mtr (Results 1 – 18 of 18) sorted by relevance

/Linux-v5.4/drivers/edac/
Di7300_edac.c105 u16 mtr[MAX_SLOTS][MAX_BRANCHES]; /* Memory Technlogy Reg */ member
172 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (1 << 8)) argument
173 #define MTR_DIMMS_ETHROTTLE(mtr) ((mtr) & (1 << 7)) argument
174 #define MTR_DRAM_WIDTH(mtr) (((mtr) & (1 << 6)) ? 8 : 4) argument
175 #define MTR_DRAM_BANKS(mtr) (((mtr) & (1 << 5)) ? 8 : 4) argument
176 #define MTR_DIMM_RANKS(mtr) (((mtr) & (1 << 4)) ? 1 : 0) argument
177 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument
179 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument
180 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument
181 #define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10) argument
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Di5400_edac.c285 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (1 << 10)) argument
286 #define MTR_DIMMS_ETHROTTLE(mtr) ((mtr) & (1 << 9)) argument
287 #define MTR_DRAM_WIDTH(mtr) (((mtr) & (1 << 8)) ? 8 : 4) argument
288 #define MTR_DRAM_BANKS(mtr) (((mtr) & (1 << 6)) ? 8 : 4) argument
289 #define MTR_DRAM_BANKS_ADDR_BITS(mtr) ((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2) argument
290 #define MTR_DIMM_RANK(mtr) (((mtr) >> 5) & 0x1) argument
291 #define MTR_DIMM_RANK_ADDR_BITS(mtr) (MTR_DIMM_RANK(mtr) ? 2 : 1) argument
292 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument
293 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument
294 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument
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Di5000_edac.c279 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (0x1 << 8)) argument
280 #define MTR_DRAM_WIDTH(mtr) ((((mtr) >> 6) & 0x1) ? 8 : 4) argument
281 #define MTR_DRAM_BANKS(mtr) ((((mtr) >> 5) & 0x1) ? 8 : 4) argument
282 #define MTR_DRAM_BANKS_ADDR_BITS(mtr) ((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2) argument
283 #define MTR_DIMM_RANK(mtr) (((mtr) >> 4) & 0x1) argument
284 #define MTR_DIMM_RANK_ADDR_BITS(mtr) (MTR_DIMM_RANK(mtr) ? 2 : 1) argument
285 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3) argument
286 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13) argument
287 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3) argument
288 #define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10) argument
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Dsb_edac.c213 #define RANK_DISABLE(mtr) GET_BITFIELD(mtr, 16, 19) argument
214 #define IS_DIMM_PRESENT(mtr) GET_BITFIELD(mtr, 14, 14) argument
215 #define RANK_CNT_BITS(mtr) GET_BITFIELD(mtr, 12, 13) argument
216 #define RANK_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 2, 4) argument
217 #define COL_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 0, 1) argument
329 enum dev_type (*get_width)(struct sbridge_pvt *pvt, u32 mtr);
689 static inline int numrank(enum type type, u32 mtr) in numrank() argument
691 int ranks = (1 << RANK_CNT_BITS(mtr)); in numrank()
699 ranks, max, (unsigned int)RANK_CNT_BITS(mtr), mtr); in numrank()
706 static inline int numrow(u32 mtr) in numrow() argument
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Dskx_common.c165 static int get_width(u32 mtr) in get_width() argument
167 switch (GET_BITFIELD(mtr, 8, 9)) { in get_width()
286 int skx_get_dimm_info(u32 mtr, u32 amap, struct dimm_info *dimm, in skx_get_dimm_info() argument
292 ranks = numrank(mtr); in skx_get_dimm_info()
293 rows = numrow(mtr); in skx_get_dimm_info()
294 cols = numcol(mtr); in skx_get_dimm_info()
306 imc->chan[chan].dimms[dimmno].close_pg = GET_BITFIELD(mtr, 0, 0); in skx_get_dimm_info()
307 imc->chan[chan].dimms[dimmno].bank_xor_enable = GET_BITFIELD(mtr, 9, 9); in skx_get_dimm_info()
314 dimm->dtype = get_width(mtr); in skx_get_dimm_info()
Di10nm_base.c148 u32 mtr, mcddrtcfg; in i10nm_get_dimm_config() local
159 mtr = I10NM_GET_DIMMMTR(imc, i, j); in i10nm_get_dimm_config()
162 mtr, mcddrtcfg, imc->mc, i, j); in i10nm_get_dimm_config()
164 if (IS_DIMM_PRESENT(mtr)) in i10nm_get_dimm_config()
165 ndimms += skx_get_dimm_info(mtr, 0, dimm, in i10nm_get_dimm_config()
Di5100_edac.c339 } mtr[I5100_CHANNELS][I5100_MAX_RANKS_PER_CHAN]; member
666 if (!priv->mtr[chan][chan_rank].present) in i5100_npages()
671 priv->mtr[chan][chan_rank].numcol + in i5100_npages()
672 priv->mtr[chan][chan_rank].numrow + in i5100_npages()
673 priv->mtr[chan][chan_rank].numbank; in i5100_npages()
697 priv->mtr[i][j].present = i5100_mtr_present(w); in i5100_init_mtr()
698 priv->mtr[i][j].ethrottle = i5100_mtr_ethrottle(w); in i5100_init_mtr()
699 priv->mtr[i][j].width = 4 + 4 * i5100_mtr_width(w); in i5100_init_mtr()
700 priv->mtr[i][j].numbank = 2 + i5100_mtr_numbank(w); in i5100_init_mtr()
701 priv->mtr[i][j].numrow = 13 + i5100_mtr_numrow(w); in i5100_init_mtr()
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Dskx_base.c170 u32 mtr, amap, mcddrtcfg; in skx_get_dimm_config() local
183 0x80 + 4 * j, &mtr); in skx_get_dimm_config()
184 if (IS_DIMM_PRESENT(mtr)) { in skx_get_dimm_config()
185 ndimms += skx_get_dimm_info(mtr, amap, dimm, imc, i, j); in skx_get_dimm_config()
Dskx_common.h129 int skx_get_dimm_info(u32 mtr, u32 amap, struct dimm_info *dimm,
/Linux-v5.4/drivers/infiniband/hw/hns/
Dhns_roce_mr.c1564 void hns_roce_mtr_init(struct hns_roce_mtr *mtr, int bt_pg_shift, in hns_roce_mtr_init() argument
1567 hns_roce_hem_list_init(&mtr->hem_list, bt_pg_shift); in hns_roce_mtr_init()
1568 mtr->buf_pg_shift = buf_pg_shift; in hns_roce_mtr_init()
1572 struct hns_roce_mtr *mtr) in hns_roce_mtr_cleanup() argument
1574 hns_roce_hem_list_release(hr_dev, &mtr->hem_list); in hns_roce_mtr_cleanup()
1578 struct hns_roce_mtr *mtr, dma_addr_t *bufs, in hns_roce_write_mtr() argument
1592 mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list, in hns_roce_write_mtr()
1612 int hns_roce_mtr_attach(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, in hns_roce_mtr_attach() argument
1620 ret = hns_roce_hem_list_request(hr_dev, &mtr->hem_list, regions, in hns_roce_mtr_attach()
1627 ret = hns_roce_write_mtr(hr_dev, mtr, bufs[i], r); in hns_roce_mtr_attach()
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Dhns_roce_device.h666 struct hns_roce_mtr mtr; member
1141 void hns_roce_mtr_init(struct hns_roce_mtr *mtr, int bt_pg_shift,
1143 int hns_roce_mtr_attach(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
1147 struct hns_roce_mtr *mtr);
1151 int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
Dhns_roce_qp.c907 hns_roce_mtr_init(&hr_qp->mtr, PAGE_SHIFT + hr_qp->wqe_bt_pg_shift, in hns_roce_create_qp_common()
909 ret = hns_roce_mtr_attach(hr_dev, &hr_qp->mtr, buf_list, in hns_roce_create_qp_common()
967 hns_roce_mtr_cleanup(hr_dev, &hr_qp->mtr); in hns_roce_create_qp_common()
Dhns_roce_hw_v2.c3687 count = hns_roce_mtr_find(hr_dev, &hr_qp->mtr, in modify_qp_init_to_rtr()
3923 count = hns_roce_mtr_find(hr_dev, &hr_qp->mtr, 0, &sq_cur_blk, 1, NULL); in modify_qp_rtr_to_rts()
3931 count = hns_roce_mtr_find(hr_dev, &hr_qp->mtr, in modify_qp_rtr_to_rts()
4689 hns_roce_mtr_cleanup(hr_dev, &hr_qp->mtr); in hns_roce_v2_destroy_qp_common()
/Linux-v5.4/arch/alpha/include/asm/
Dcore_tsunami.h36 tsunami_64 mtr; member
Dcore_titan.h37 titan_64 mtr; member
/Linux-v5.4/arch/alpha/kernel/
Dcore_tsunami.c397 printk("%s: CSR_MTR 0x%lx\n", __func__, TSUNAMI_cchip.mtr.csr); in tsunami_init_arch()
Dcore_titan.c374 printk("%s: CSR_MTR 0x%lx\n", __func__, TITAN_cchip->mtr.csr); in titan_init_arch()
/Linux-v5.4/drivers/net/ethernet/mellanox/mlxsw/
Dreg.h8216 MLXSW_ITEM32(reg, mtmp, mtr, 0x08, 30, 1);