| /Linux-v5.4/drivers/gpu/drm/radeon/ |
| D | evergreen_cs.c | 1183 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1186 &bankw, &bankh, &mtaspect, in evergreen_cs_handle_reg()
1192 DB_MACRO_TILE_ASPECT(mtaspect); in evergreen_cs_handle_reg()
1447 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1450 &bankw, &bankh, &mtaspect, in evergreen_cs_handle_reg()
1456 CB_MACRO_TILE_ASPECT(mtaspect); in evergreen_cs_handle_reg()
1475 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1478 &bankw, &bankh, &mtaspect, in evergreen_cs_handle_reg()
1484 CB_MACRO_TILE_ASPECT(mtaspect); in evergreen_cs_handle_reg()
2364 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_packet3_check() local
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| D | radeon_object.c | 682 unsigned bankw, bankh, mtaspect, tilesplit, stilesplit; in radeon_bo_set_tiling_flags() local
686 …mtaspect = (tiling_flags >> RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT) & RADEON_TILING_EG_MACRO_TIL… in radeon_bo_set_tiling_flags()
709 switch (mtaspect) { in radeon_bo_set_tiling_flags()
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| D | evergreen.c | 1115 unsigned *bankh, unsigned *mtaspect, in evergreen_tiling_fields() argument
1120 …*mtaspect = (tiling_flags >> RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT) & RADEON_TILING_EG_MACRO_TI… in evergreen_tiling_fields()
1136 switch (*mtaspect) { in evergreen_tiling_fields()
1138 case 1: *mtaspect = EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_1; break; in evergreen_tiling_fields()
1139 case 2: *mtaspect = EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_2; break; in evergreen_tiling_fields()
1140 case 4: *mtaspect = EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_4; break; in evergreen_tiling_fields()
1141 case 8: *mtaspect = EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_8; break; in evergreen_tiling_fields()
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| D | atombios_crtc.c | 1156 unsigned bankw, bankh, mtaspect, tile_split; in dce4_crtc_do_set_base() local
1277 evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); in dce4_crtc_do_set_base()
1345 fb_format |= EVERGREEN_GRPH_MACRO_TILE_ASPECT(mtaspect); in dce4_crtc_do_set_base()
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| D | radeon.h | 353 unsigned *bankh, unsigned *mtaspect,
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| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | dce_v8_0.c | 1892 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v8_0_crtc_do_set_base() local
1896 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v8_0_crtc_do_set_base()
1905 fb_format |= (mtaspect << GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT); in dce_v8_0_crtc_do_set_base()
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| D | dce_v6_0.c | 1918 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v6_0_crtc_do_set_base() local
1922 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v6_0_crtc_do_set_base()
1931 fb_format |= GRPH_MACRO_TILE_ASPECT(mtaspect); in dce_v6_0_crtc_do_set_base()
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| D | dce_v10_0.c | 1971 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v10_0_crtc_do_set_base() local
1975 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v10_0_crtc_do_set_base()
1987 mtaspect); in dce_v10_0_crtc_do_set_base()
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| D | dce_v11_0.c | 2013 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v11_0_crtc_do_set_base() local
2017 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v11_0_crtc_do_set_base()
2029 mtaspect); in dce_v11_0_crtc_do_set_base()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm.c | 2810 unsigned int bankw, bankh, mtaspect, tile_split, num_banks; in fill_plane_buffer_attributes() local
2814 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in fill_plane_buffer_attributes()
2825 tiling_info->gfx8.tile_aspect = mtaspect; in fill_plane_buffer_attributes()
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