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Searched refs:msm_gpu (Results 1 – 25 of 32) sorted by relevance

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/Linux-v5.4/drivers/gpu/drm/msm/
Dmsm_gpu.h44 int (*get_param)(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
45 int (*hw_init)(struct msm_gpu *gpu);
46 int (*pm_suspend)(struct msm_gpu *gpu);
47 int (*pm_resume)(struct msm_gpu *gpu);
48 void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit,
50 void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
51 irqreturn_t (*irq)(struct msm_gpu *irq);
52 struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu);
53 void (*recover)(struct msm_gpu *gpu);
54 void (*destroy)(struct msm_gpu *gpu);
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Dmsm_gpu.c27 struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev)); in msm_devfreq_target()
48 struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev)); in msm_devfreq_get_dev_status()
67 struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev)); in msm_devfreq_get_cur_freq()
84 static void msm_devfreq_init(struct msm_gpu *gpu) in msm_devfreq_init()
109 static int enable_pwrrail(struct msm_gpu *gpu) in enable_pwrrail()
133 static int disable_pwrrail(struct msm_gpu *gpu) in disable_pwrrail()
142 static int enable_clk(struct msm_gpu *gpu) in enable_clk()
154 static int disable_clk(struct msm_gpu *gpu) in disable_clk()
172 static int enable_axi(struct msm_gpu *gpu) in enable_axi()
179 static int disable_axi(struct msm_gpu *gpu) in disable_axi()
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Dmsm_debugfs.c29 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show()
49 struct msm_gpu *gpu = priv->gpu; in msm_gpu_release()
68 struct msm_gpu *gpu = priv->gpu; in msm_gpu_open()
118 struct msm_gpu *gpu = priv->gpu; in msm_gem_show()
Dmsm_ringbuffer.h37 struct msm_gpu *gpu;
51 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
Dmsm_gem.h61 struct msm_gpu *gpu; /* non-null if active */
132 struct msm_gpu *gpu;
Dmsm_gpummu.c13 struct msm_gpu *gpu;
97 struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu) in msm_gpummu_new()
Dmsm_drv.h37 struct msm_gpu;
163 struct msm_gpu *gpu;
254 msm_gem_address_space_create_a2xx(struct device *dev, struct msm_gpu *gpu,
303 struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence);
Dmsm_perf.c61 struct msm_gpu *gpu = priv->gpu; in refill_buf()
155 struct msm_gpu *gpu = priv->gpu; in perf_open()
Dmsm_mmu.h36 struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu);
Dmsm_ringbuffer.c10 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, in msm_ringbuffer_new()
/Linux-v5.4/drivers/gpu/drm/msm/adreno/
Da5xx_gpu.h44 int a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor);
127 int a5xx_power_init(struct msm_gpu *gpu);
128 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu);
130 static inline int spin_usecs(struct msm_gpu *gpu, uint32_t usecs, in spin_usecs()
143 bool a5xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
144 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state);
146 void a5xx_preempt_init(struct msm_gpu *gpu);
147 void a5xx_preempt_hw_init(struct msm_gpu *gpu);
148 void a5xx_preempt_trigger(struct msm_gpu *gpu);
149 void a5xx_preempt_irq(struct msm_gpu *gpu);
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Dadreno_gpu.h68 int (*get_timestamp)(struct msm_gpu *gpu, uint64_t *value);
78 struct msm_gpu *(*init)(struct drm_device *dev);
86 struct msm_gpu base;
219 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
222 struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu,
224 int adreno_hw_init(struct msm_gpu *gpu);
225 void adreno_recover(struct msm_gpu *gpu);
226 void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
228 void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
229 bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
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Da5xx_gpu.c17 static void a5xx_dump(struct msm_gpu *gpu);
21 static void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a5xx_flush()
46 static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit, in a5xx_submit_in_rb()
106 static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, in a5xx_submit()
312 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state) in a5xx_set_hwcg()
330 static int a5xx_me_init(struct msm_gpu *gpu) in a5xx_me_init()
368 static int a5xx_preempt_start(struct msm_gpu *gpu) in a5xx_preempt_start()
411 static int a5xx_ucode_init(struct msm_gpu *gpu) in a5xx_ucode_init()
459 static int a5xx_zap_shader_resume(struct msm_gpu *gpu) in a5xx_zap_shader_resume()
471 static int a5xx_zap_shader_init(struct msm_gpu *gpu) in a5xx_zap_shader_init()
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Da4xx_gpu.c25 static void a4xx_dump(struct msm_gpu *gpu);
26 static bool a4xx_idle(struct msm_gpu *gpu);
32 static void a4xx_enable_hwcg(struct msm_gpu *gpu) in a4xx_enable_hwcg()
109 static bool a4xx_me_init(struct msm_gpu *gpu) in a4xx_me_init()
136 static int a4xx_hw_init(struct msm_gpu *gpu) in a4xx_hw_init()
291 static void a4xx_recover(struct msm_gpu *gpu) in a4xx_recover()
312 static void a4xx_destroy(struct msm_gpu *gpu) in a4xx_destroy()
329 static bool a4xx_idle(struct msm_gpu *gpu) in a4xx_idle()
346 static irqreturn_t a4xx_irq(struct msm_gpu *gpu) in a4xx_irq()
449 static struct msm_gpu_state *a4xx_gpu_state_get(struct msm_gpu *gpu) in a4xx_gpu_state_get()
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Da6xx_gpu.c15 static inline bool _a6xx_check_idle(struct msm_gpu *gpu) in _a6xx_check_idle()
33 bool a6xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_idle()
52 static void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_flush()
82 static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, in a6xx_submit()
265 static void a6xx_set_hwcg(struct msm_gpu *gpu, bool state) in a6xx_set_hwcg()
292 static int a6xx_cp_init(struct msm_gpu *gpu) in a6xx_cp_init()
321 static int a6xx_ucode_init(struct msm_gpu *gpu) in a6xx_ucode_init()
349 static int a6xx_zap_shader_init(struct msm_gpu *gpu) in a6xx_zap_shader_init()
375 static int a6xx_hw_init(struct msm_gpu *gpu) in a6xx_hw_init()
561 static void a6xx_dump(struct msm_gpu *gpu) in a6xx_dump()
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Da2xx_gpu.c10 static void a2xx_dump(struct msm_gpu *gpu);
11 static bool a2xx_idle(struct msm_gpu *gpu);
13 static bool a2xx_me_init(struct msm_gpu *gpu) in a2xx_me_init()
60 static int a2xx_hw_init(struct msm_gpu *gpu) in a2xx_hw_init()
201 static void a2xx_recover(struct msm_gpu *gpu) in a2xx_recover()
222 static void a2xx_destroy(struct msm_gpu *gpu) in a2xx_destroy()
234 static bool a2xx_idle(struct msm_gpu *gpu) in a2xx_idle()
252 static irqreturn_t a2xx_irq(struct msm_gpu *gpu) in a2xx_irq()
383 static void a2xx_dump(struct msm_gpu *gpu) in a2xx_dump()
390 static struct msm_gpu_state *a2xx_gpu_state_get(struct msm_gpu *gpu) in a2xx_gpu_state_get()
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Da5xx_debugfs.c14 static int pfp_print(struct msm_gpu *gpu, struct drm_printer *p) in pfp_print()
29 static int me_print(struct msm_gpu *gpu, struct drm_printer *p) in me_print()
44 static int meq_print(struct msm_gpu *gpu, struct drm_printer *p) in meq_print()
59 static int roq_print(struct msm_gpu *gpu, struct drm_printer *p) in roq_print()
84 int (*show)(struct msm_gpu *gpu, struct drm_printer *p) = in show()
104 struct msm_gpu *gpu = priv->gpu; in reset_set()
151 int a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) in a5xx_debugfs_init()
Da5xx_preempt.c40 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr()
56 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring()
79 struct msm_gpu *gpu = &a5xx_gpu->base.base; in a5xx_preempt_timer()
91 void a5xx_preempt_trigger(struct msm_gpu *gpu) in a5xx_preempt_trigger()
159 void a5xx_preempt_irq(struct msm_gpu *gpu) in a5xx_preempt_irq()
196 void a5xx_preempt_hw_init(struct msm_gpu *gpu) in a5xx_preempt_hw_init()
227 struct msm_gpu *gpu = &adreno_gpu->base; in preempt_init_ring()
257 void a5xx_preempt_fini(struct msm_gpu *gpu) in a5xx_preempt_fini()
267 void a5xx_preempt_init(struct msm_gpu *gpu) in a5xx_preempt_init()
Da6xx_gpu.h59 void a6xx_gmu_set_freq(struct msm_gpu *gpu, unsigned long freq);
60 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu);
62 void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
65 struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu);
Da3xx_gpu.c32 static void a3xx_dump(struct msm_gpu *gpu);
33 static bool a3xx_idle(struct msm_gpu *gpu);
35 static bool a3xx_me_init(struct msm_gpu *gpu) in a3xx_me_init()
62 static int a3xx_hw_init(struct msm_gpu *gpu) in a3xx_hw_init()
291 static void a3xx_recover(struct msm_gpu *gpu) in a3xx_recover()
312 static void a3xx_destroy(struct msm_gpu *gpu) in a3xx_destroy()
329 static bool a3xx_idle(struct msm_gpu *gpu) in a3xx_idle()
347 static irqreturn_t a3xx_irq(struct msm_gpu *gpu) in a3xx_irq()
402 static void a3xx_dump(struct msm_gpu *gpu) in a3xx_dump()
409 static struct msm_gpu_state *a3xx_gpu_state_get(struct msm_gpu *gpu) in a3xx_gpu_state_get()
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Da5xx_power.c103 static inline uint32_t _get_mvolts(struct msm_gpu *gpu, uint32_t freq) in _get_mvolts()
122 static void a530_lm_setup(struct msm_gpu *gpu) in a530_lm_setup()
175 static void a540_lm_setup(struct msm_gpu *gpu) in a540_lm_setup()
211 static void a5xx_pc_init(struct msm_gpu *gpu) in a5xx_pc_init()
220 static int a5xx_gpmu_init(struct msm_gpu *gpu) in a5xx_gpmu_init()
278 static void a5xx_lm_enable(struct msm_gpu *gpu) in a5xx_lm_enable()
295 int a5xx_power_init(struct msm_gpu *gpu) in a5xx_power_init()
320 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) in a5xx_gpmu_ucode_init()
Da6xx_gpu_state.c112 static int a6xx_crashdumper_init(struct msm_gpu *gpu, in a6xx_crashdumper_init()
125 static int a6xx_crashdumper_run(struct msm_gpu *gpu, in a6xx_crashdumper_run()
156 static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset, in debugbus_read()
204 static int vbif_debugbus_read(struct msm_gpu *gpu, u32 ctrl0, u32 ctrl1, in vbif_debugbus_read()
228 static void a6xx_get_vbif_debugbus_block(struct msm_gpu *gpu, in a6xx_get_vbif_debugbus_block()
282 static void a6xx_get_debugbus_block(struct msm_gpu *gpu, in a6xx_get_debugbus_block()
318 static void a6xx_get_debugbus(struct msm_gpu *gpu, in a6xx_get_debugbus()
427 static void a6xx_get_dbgahb_cluster(struct msm_gpu *gpu, in a6xx_get_dbgahb_cluster()
473 static void a6xx_get_dbgahb_clusters(struct msm_gpu *gpu, in a6xx_get_dbgahb_clusters()
495 static void a6xx_get_cluster(struct msm_gpu *gpu, in a6xx_get_cluster()
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Dadreno_gpu.c23 static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname, in zap_shader_load_mdt()
133 int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid) in adreno_zap_shader_load()
159 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) in adreno_get_param()
313 struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, in adreno_fw_create_bo()
332 int adreno_hw_init(struct msm_gpu *gpu) in adreno_hw_init()
391 struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu) in adreno_active_ring()
396 void adreno_recover(struct msm_gpu *gpu) in adreno_recover()
414 void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, in adreno_submit()
486 void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in adreno_flush()
507 bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in adreno_idle()
[all …]
Dadreno_device.c208 struct msm_gpu *adreno_load_gpu(struct drm_device *dev) in adreno_load_gpu()
212 struct msm_gpu *gpu = NULL; in adreno_load_gpu()
322 struct msm_gpu *gpu; in adreno_bind()
360 struct msm_gpu *gpu = dev_get_drvdata(dev); in adreno_unbind()
426 struct msm_gpu *gpu = platform_get_drvdata(pdev); in adreno_resume()
434 struct msm_gpu *gpu = platform_get_drvdata(pdev); in adreno_suspend()
Da6xx_gmu.c17 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_fault()
107 struct msm_gpu *gpu = &adreno_gpu->base; in __a6xx_gmu_set_freq()
138 void a6xx_gmu_set_freq(struct msm_gpu *gpu, unsigned long freq) in a6xx_gmu_set_freq()
155 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu) in a6xx_gmu_get_freq()
696 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_resume()
786 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_shutdown()
846 struct msm_gpu *gpu = &a6xx_gpu->base.base; in a6xx_gmu_stop()
1095 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_rpmh_votes_init()
1145 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_pwrlevels_probe()

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