Searched refs:mscr (Results 1 – 3 of 3) sorted by relevance
867 u32 mscr; in cpc925_get_sdram_scrub_rate() local870 mscr = __raw_readl(pdata->vbase + REG_MSCR_OFFSET); in cpc925_get_sdram_scrub_rate()871 si = (mscr & MSCR_SI_MASK) >> MSCR_SI_SHIFT; in cpc925_get_sdram_scrub_rate()873 edac_dbg(0, "Mem Scrub Ctrl Register 0x%x\n", mscr); in cpc925_get_sdram_scrub_rate()875 if (((mscr & MSCR_SCRUB_MOD_MASK) != MSCR_BACKGR_SCRUB) || in cpc925_get_sdram_scrub_rate()
1503 __u16 mscr; in mii_get_media() local1519 mscr = mii_read (dev, phy_addr, MII_CTRL1000); in mii_get_media()1521 if (mscr & ADVERTISE_1000FULL && mssr & LPA_1000FULL) { in mii_get_media()1525 } else if (mscr & ADVERTISE_1000HALF && mssr & LPA_1000HALF) { in mii_get_media()1663 mscr = mii_read (dev, phy_addr, MII_CTRL1000); in mii_set_media()1664 mscr |= MII_MSCR_CFG_ENABLE; in mii_set_media()1665 mscr &= ~MII_MSCR_CFG_VALUE = 0; in mii_set_media()
435 int mscr; in m88e1121_config_aneg_rgmii_delays() local438 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | in m88e1121_config_aneg_rgmii_delays()441 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; in m88e1121_config_aneg_rgmii_delays()443 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; in m88e1121_config_aneg_rgmii_delays()445 mscr = 0; in m88e1121_config_aneg_rgmii_delays()449 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); in m88e1121_config_aneg_rgmii_delays()