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Searched refs:mpll_param (Results 1 – 13 of 13) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dppatomctrl.c250 pp_atomctrl_memory_clock_param *mpll_param, in atomctrl_get_memory_pll_dividers_si() argument
265 mpll_param->mpll_fb_divider.clk_frac = in atomctrl_get_memory_pll_dividers_si()
267 mpll_param->mpll_fb_divider.cl_kf = in atomctrl_get_memory_pll_dividers_si()
269 mpll_param->mpll_post_divider = in atomctrl_get_memory_pll_dividers_si()
271 mpll_param->vco_mode = in atomctrl_get_memory_pll_dividers_si()
274 mpll_param->yclk_sel = in atomctrl_get_memory_pll_dividers_si()
277 mpll_param->qdr = in atomctrl_get_memory_pll_dividers_si()
280 mpll_param->half_rate = in atomctrl_get_memory_pll_dividers_si()
283 mpll_param->dll_speed = in atomctrl_get_memory_pll_dividers_si()
285 mpll_param->bw_ctrl = in atomctrl_get_memory_pll_dividers_si()
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Dppatomctrl.h299 …pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param, bool strobe_mod…
305 uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param);
307 uint32_t clock_value, pp_atomctrl_memory_clock_param_ai *mpll_param);
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atombios.c1105 struct atom_mpll_param *mpll_param) in amdgpu_atombios_get_memory_pll_dividers() argument
1112 memset(mpll_param, 0, sizeof(struct atom_mpll_param)); in amdgpu_atombios_get_memory_pll_dividers()
1129 mpll_param->clkfrac = le16_to_cpu(args.ulFbDiv.usFbDivFrac); in amdgpu_atombios_get_memory_pll_dividers()
1130 mpll_param->clkf = le16_to_cpu(args.ulFbDiv.usFbDiv); in amdgpu_atombios_get_memory_pll_dividers()
1131 mpll_param->post_div = args.ucPostDiv; in amdgpu_atombios_get_memory_pll_dividers()
1132 mpll_param->dll_speed = args.ucDllSpeed; in amdgpu_atombios_get_memory_pll_dividers()
1133 mpll_param->bwcntl = args.ucBWCntl; in amdgpu_atombios_get_memory_pll_dividers()
1134 mpll_param->vco_mode = in amdgpu_atombios_get_memory_pll_dividers()
1136 mpll_param->yclk_sel = in amdgpu_atombios_get_memory_pll_dividers()
1138 mpll_param->qdr = in amdgpu_atombios_get_memory_pll_dividers()
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Damdgpu_atombios.h166 struct atom_mpll_param *mpll_param);
Dsi_dpm.c5353 struct atom_mpll_param mpll_param; in si_populate_mclk_value() local
5356 ret = amdgpu_atombios_get_memory_pll_dividers(adev, memory_clock, strobe_mode, &mpll_param); in si_populate_mclk_value()
5361 mpll_func_cntl |= BWCTRL(mpll_param.bwcntl); in si_populate_mclk_value()
5364 mpll_func_cntl_1 |= CLKF(mpll_param.clkf) | in si_populate_mclk_value()
5365 CLKFRAC(mpll_param.clkfrac) | VCO_MODE(mpll_param.vco_mode); in si_populate_mclk_value()
5368 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
5372 mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | in si_populate_mclk_value()
5373 YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
5403 mclk_pwrmgt_cntl |= DLL_SPEED(mpll_param.dll_speed); in si_populate_mclk_value()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Diceland_smumgr.c1064 pp_atomctrl_memory_clock_param mpll_param; in iceland_calculate_mclk_params() local
1068 memory_clock, &mpll_param, strobe_mode); in iceland_calculate_mclk_params()
1073 mpll_func_cntl = PHM_SET_FIELD(mpll_func_cntl, MPLL_FUNC_CNTL, BWCTRL, mpll_param.bw_ctrl); in iceland_calculate_mclk_params()
1077 MPLL_FUNC_CNTL_1, CLKF, mpll_param.mpll_fb_divider.cl_kf); in iceland_calculate_mclk_params()
1079 MPLL_FUNC_CNTL_1, CLKFRAC, mpll_param.mpll_fb_divider.clk_frac); in iceland_calculate_mclk_params()
1081 MPLL_FUNC_CNTL_1, VCO_MODE, mpll_param.vco_mode); in iceland_calculate_mclk_params()
1085 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in iceland_calculate_mclk_params()
1090 MPLL_DQ_FUNC_CNTL, YCLK_SEL, mpll_param.yclk_sel); in iceland_calculate_mclk_params()
1092 MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in iceland_calculate_mclk_params()
1118 if (1 == mpll_param.qdr) in iceland_calculate_mclk_params()
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Dci_smumgr.c1040 pp_atomctrl_memory_clock_param mpll_param; in ci_calculate_mclk_params() local
1044 memory_clock, &mpll_param, strobe_mode); in ci_calculate_mclk_params()
1048 mpll_func_cntl = PHM_SET_FIELD(mpll_func_cntl, MPLL_FUNC_CNTL, BWCTRL, mpll_param.bw_ctrl); in ci_calculate_mclk_params()
1051 MPLL_FUNC_CNTL_1, CLKF, mpll_param.mpll_fb_divider.cl_kf); in ci_calculate_mclk_params()
1053 MPLL_FUNC_CNTL_1, CLKFRAC, mpll_param.mpll_fb_divider.clk_frac); in ci_calculate_mclk_params()
1055 MPLL_FUNC_CNTL_1, VCO_MODE, mpll_param.vco_mode); in ci_calculate_mclk_params()
1058 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in ci_calculate_mclk_params()
1062 MPLL_DQ_FUNC_CNTL, YCLK_SEL, mpll_param.yclk_sel); in ci_calculate_mclk_params()
1064 MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in ci_calculate_mclk_params()
1075 if (1 == mpll_param.qdr) in ci_calculate_mclk_params()
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Dtonga_smumgr.c807 pp_atomctrl_memory_clock_param mpll_param; in tonga_calculate_mclk_params() local
811 memory_clock, &mpll_param, strobe_mode); in tonga_calculate_mclk_params()
819 mpll_param.bw_ctrl); in tonga_calculate_mclk_params()
824 mpll_param.mpll_fb_divider.cl_kf); in tonga_calculate_mclk_params()
827 mpll_param.mpll_fb_divider.clk_frac); in tonga_calculate_mclk_params()
830 mpll_param.vco_mode); in tonga_calculate_mclk_params()
835 mpll_param.mpll_post_divider); in tonga_calculate_mclk_params()
841 mpll_param.yclk_sel); in tonga_calculate_mclk_params()
844 mpll_param.mpll_post_divider); in tonga_calculate_mclk_params()
870 if (1 == mpll_param.qdr) in tonga_calculate_mclk_params()
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Dvegam_smumgr.c963 struct pp_atomctrl_memory_clock_param_ai mpll_param; in vegam_calculate_mclk_params() local
966 clock, &mpll_param), in vegam_calculate_mclk_params()
970 mem_level->MclkFrequency = (uint32_t)mpll_param.ulClock; in vegam_calculate_mclk_params()
971 mem_level->Fcw_int = (uint16_t)mpll_param.ulMclk_fcw_int; in vegam_calculate_mclk_params()
972 mem_level->Fcw_frac = (uint16_t)mpll_param.ulMclk_fcw_frac; in vegam_calculate_mclk_params()
973 mem_level->Postdiv = (uint8_t)mpll_param.ulPostDiv; in vegam_calculate_mclk_params()
/Linux-v5.4/drivers/gpu/drm/radeon/
Dradeon_atombios.c2957 struct atom_mpll_param *mpll_param) in radeon_atom_get_memory_pll_dividers() argument
2964 memset(mpll_param, 0, sizeof(struct atom_mpll_param)); in radeon_atom_get_memory_pll_dividers()
2981 mpll_param->clkfrac = le16_to_cpu(args.ulFbDiv.usFbDivFrac); in radeon_atom_get_memory_pll_dividers()
2982 mpll_param->clkf = le16_to_cpu(args.ulFbDiv.usFbDiv); in radeon_atom_get_memory_pll_dividers()
2983 mpll_param->post_div = args.ucPostDiv; in radeon_atom_get_memory_pll_dividers()
2984 mpll_param->dll_speed = args.ucDllSpeed; in radeon_atom_get_memory_pll_dividers()
2985 mpll_param->bwcntl = args.ucBWCntl; in radeon_atom_get_memory_pll_dividers()
2986 mpll_param->vco_mode = in radeon_atom_get_memory_pll_dividers()
2988 mpll_param->yclk_sel = in radeon_atom_get_memory_pll_dividers()
2990 mpll_param->qdr = in radeon_atom_get_memory_pll_dividers()
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Dci_dpm.c2804 struct atom_mpll_param mpll_param; in ci_calculate_mclk_params() local
2807 ret = radeon_atom_get_memory_pll_dividers(rdev, memory_clock, strobe_mode, &mpll_param); in ci_calculate_mclk_params()
2812 mpll_func_cntl |= BWCTRL(mpll_param.bwcntl); in ci_calculate_mclk_params()
2815 mpll_func_cntl_1 |= CLKF(mpll_param.clkf) | in ci_calculate_mclk_params()
2816 CLKFRAC(mpll_param.clkfrac) | VCO_MODE(mpll_param.vco_mode); in ci_calculate_mclk_params()
2819 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in ci_calculate_mclk_params()
2823 mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | in ci_calculate_mclk_params()
2824 YCLK_POST_DIV(mpll_param.post_div); in ci_calculate_mclk_params()
2833 if (mpll_param.qdr == 1) in ci_calculate_mclk_params()
2834 freq_nom = memory_clock * 4 * (1 << mpll_param.post_div); in ci_calculate_mclk_params()
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Dsi_dpm.c4891 struct atom_mpll_param mpll_param; in si_populate_mclk_value() local
4894 ret = radeon_atom_get_memory_pll_dividers(rdev, memory_clock, strobe_mode, &mpll_param); in si_populate_mclk_value()
4899 mpll_func_cntl |= BWCTRL(mpll_param.bwcntl); in si_populate_mclk_value()
4902 mpll_func_cntl_1 |= CLKF(mpll_param.clkf) | in si_populate_mclk_value()
4903 CLKFRAC(mpll_param.clkfrac) | VCO_MODE(mpll_param.vco_mode); in si_populate_mclk_value()
4906 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
4910 mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | in si_populate_mclk_value()
4911 YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
4941 mclk_pwrmgt_cntl |= DLL_SPEED(mpll_param.dll_speed); in si_populate_mclk_value()
Dradeon.h298 struct atom_mpll_param *mpll_param);