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Searched refs:mmWD_CNTL_SB_BUF_BASE (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h4926 #define mmWD_CNTL_SB_BUF_BASE … macro
Dgc_9_1_offset.h5178 #define mmWD_CNTL_SB_BUF_BASE … macro
Dgc_9_2_1_offset.h5134 #define mmWD_CNTL_SB_BUF_BASE … macro
Dgc_10_1_0_offset.h7450 #define mmWD_CNTL_SB_BUF_BASE … macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c2123 WREG32_SOC15(GC, 0, mmWD_CNTL_SB_BUF_BASE, data); in gfx_v9_0_ngg_en()