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Searched refs:mmVCE_UENC_CLOCK_GATING_2 (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/vce/
Dvce_3_0_d.h57 #define mmVCE_UENC_CLOCK_GATING_2 0x8210 macro
Dvce_4_0_offset.h120 #define mmVCE_UENC_CLOCK_GATING_2 … macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dvce_v3_0.c192 data = RREG32(mmVCE_UENC_CLOCK_GATING_2); in vce_v3_0_set_vce_sw_clock_gating()
195 WREG32(mmVCE_UENC_CLOCK_GATING_2, data); in vce_v3_0_set_vce_sw_clock_gating()
217 data = RREG32(mmVCE_UENC_CLOCK_GATING_2); in vce_v3_0_set_vce_sw_clock_gating()
219 WREG32(mmVCE_UENC_CLOCK_GATING_2, data); in vce_v3_0_set_vce_sw_clock_gating()
Dvce_v4_0.c831 data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING_2));
834 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING_2), data);
856 data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING_2));
858 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING_2), data);