Home
last modified time | relevance | path

Searched refs:mmUVD_VCPU_NONCACHE_OFFSET1_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_offset.h714 #define mmUVD_VCPU_NONCACHE_OFFSET1_BASE_IDX … macro
Dvcn_2_0_0_offset.h655 #define mmUVD_VCPU_NONCACHE_OFFSET1_BASE_IDX … macro