Home
last modified time | relevance | path

Searched refs:mmUVD_RB_WPTR (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_6_0_d.h48 #define mmUVD_RB_WPTR 0x3c2a macro
Duvd_7_0_offset.h102 #define mmUVD_RB_WPTR macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h224 #define mmUVD_RB_WPTR macro
Dvcn_2_5_offset.h547 #define mmUVD_RB_WPTR macro
Dvcn_2_0_0_offset.h936 #define mmUVD_RB_WPTR macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dvcn_v2_0.c1209 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1237 tmp = RREG32_SOC15(UVD, 0, mmUVD_RB_WPTR); in vcn_v2_0_stop_dpg_mode()
1366 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_pause_dpg_mode()
1681 return RREG32_SOC15(UVD, 0, mmUVD_RB_WPTR); in vcn_v2_0_enc_ring_get_wptr()
1706 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_enc_ring_set_wptr()
Dvcn_v1_0.c939 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v1_0_start_spg_mode()
1191 tmp = RREG32_SOC15(UVD, 0, mmUVD_RB_WPTR); in vcn_v1_0_stop_dpg_mode()
1265 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v1_0_pause_dpg_mode()
1619 return RREG32_SOC15(UVD, 0, mmUVD_RB_WPTR); in vcn_v1_0_enc_ring_get_wptr()
1636 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, in vcn_v1_0_enc_ring_set_wptr()
Duvd_v6_0.c126 return RREG32(mmUVD_RB_WPTR); in uvd_v6_0_enc_ring_get_wptr()
157 WREG32(mmUVD_RB_WPTR, in uvd_v6_0_enc_ring_set_wptr()
843 WREG32(mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in uvd_v6_0_start()
Dvcn_v2_5.c871 WREG32_SOC15(UVD, i, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_5_start()
1064 return RREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR); in vcn_v2_5_enc_ring_get_wptr()
1089 WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_5_enc_ring_set_wptr()
Duvd_v7_0.c124 return RREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR); in uvd_v7_0_enc_ring_get_wptr()
162 WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR, in uvd_v7_0_enc_ring_set_wptr()
1095 WREG32_SOC15(UVD, k, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in uvd_v7_0_start()