Searched refs:mmUVD_RBC_RB_CNTL (Results 1 – 15 of 15) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| D | uvd_4_0_d.h | 70 #define mmUVD_RBC_RB_CNTL 0x3DA9 macro
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| D | uvd_4_2_d.h | 74 #define mmUVD_RBC_RB_CNTL 0x3da9 macro
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| D | uvd_5_0_d.h | 80 #define mmUVD_RBC_RB_CNTL 0x3da9 macro
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| D | uvd_6_0_d.h | 96 #define mmUVD_RBC_RB_CNTL 0x3da9 macro
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| D | uvd_7_0_offset.h | 202 #define mmUVD_RBC_RB_CNTL … macro
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| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | uvd_v4_2.c | 348 WREG32(mmUVD_RBC_RB_CNTL, 0x11010101); in uvd_v4_2_start()
369 WREG32_P(mmUVD_RBC_RB_CNTL, rb_bufsz, ~0x11f1f); in uvd_v4_2_start()
386 WREG32(mmUVD_RBC_RB_CNTL, 0x11010101); in uvd_v4_2_stop()
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| D | uvd_v5_0.c | 401 WREG32(mmUVD_RBC_RB_CNTL, tmp); in uvd_v5_0_start()
421 WREG32_P(mmUVD_RBC_RB_CNTL, 0, ~UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK); in uvd_v5_0_start()
436 WREG32(mmUVD_RBC_RB_CNTL, 0x11010101); in uvd_v5_0_stop()
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| D | uvd_v7_0.c | 897 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_RBC_RB_CNTL), tmp); in uvd_v7_0_sriov_start()
1068 WREG32_SOC15(UVD, k, mmUVD_RBC_RB_CNTL, tmp); in uvd_v7_0_start()
1090 WREG32_P(SOC15_REG_OFFSET(UVD, k, mmUVD_RBC_RB_CNTL), 0, in uvd_v7_0_start()
1125 WREG32_SOC15(UVD, i, mmUVD_RBC_RB_CNTL, 0x11010101); in uvd_v7_0_stop()
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| D | vcn_v1_0.c | 910 WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp); in vcn_v1_0_start_spg_mode()
934 WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_RBC_RB_CNTL), 0, in vcn_v1_0_start_spg_mode()
1083 WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp); in vcn_v1_0_start_dpg_mode()
1107 WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_RBC_RB_CNTL), 0, in vcn_v1_0_start_dpg_mode()
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| D | uvd_v6_0.c | 818 WREG32(mmUVD_RBC_RB_CNTL, tmp); in uvd_v6_0_start()
869 WREG32(mmUVD_RBC_RB_CNTL, 0x11010101); in uvd_v6_0_stop()
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| D | vcn_v2_0.c | 1027 WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp); in vcn_v2_0_start_dpg_mode()
1192 WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp); in vcn_v2_0_start()
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| D | vcn_v2_5.c | 855 WREG32_SOC15(UVD, i, mmUVD_RBC_RB_CNTL, tmp); in vcn_v2_5_start()
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| /Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| D | vcn_1_0_offset.h | 390 #define mmUVD_RBC_RB_CNTL … macro
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| D | vcn_2_5_offset.h | 773 #define mmUVD_RBC_RB_CNTL … macro
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| D | vcn_2_0_0_offset.h | 690 #define mmUVD_RBC_RB_CNTL … macro
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