| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | vcn_v1_0.c | 725 data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS); in vcn_1_0_disable_static_power_gating()
730 WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data); in vcn_1_0_disable_static_power_gating()
740 data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS); in vcn_1_0_enable_static_power_gating()
743 WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data); in vcn_1_0_enable_static_power_gating()
983 tmp = RREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS); in vcn_v1_0_start_dpg_mode()
986 WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, tmp); in vcn_v1_0_start_dpg_mode()
1186 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, in vcn_v1_0_stop_dpg_mode()
1203 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, in vcn_v1_0_stop_dpg_mode()
1208 WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_POWER_STATUS), 0, in vcn_v1_0_stop_dpg_mode()
1247 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, in vcn_v1_0_pause_dpg_mode()
[all …]
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| D | vcn_v2_0.c | 879 data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS); in vcn_v2_0_disable_static_power_gating()
885 WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data); in vcn_v2_0_disable_static_power_gating()
895 data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS); in vcn_v2_0_enable_static_power_gating()
898 WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data); in vcn_v2_0_enable_static_power_gating()
936 tmp = RREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS); in vcn_v2_0_start_dpg_mode()
939 WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, tmp); in vcn_v2_0_start_dpg_mode()
1233 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 1, in vcn_v2_0_stop_dpg_mode()
1249 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 1, in vcn_v2_0_stop_dpg_mode()
1253 WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_POWER_STATUS), 0, in vcn_v2_0_stop_dpg_mode()
1347 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 0x1, in vcn_v2_0_pause_dpg_mode()
[all …]
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| D | uvd_v5_0.c | 301 WREG32_P(mmUVD_POWER_STATUS, 0, ~(1 << 2)); in uvd_v5_0_start()
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| D | uvd_v6_0.c | 708 WREG32_P(mmUVD_POWER_STATUS, 0, ~UVD_POWER_STATUS__UVD_PG_MODE_MASK); in uvd_v6_0_start()
1454 WREG32(mmUVD_POWER_STATUS, UVD_POWER_STATUS__UVD_PG_EN_MASK); in uvd_v6_0_set_powergating_state()
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| D | vcn_v2_5.c | 723 WREG32_P(SOC15_REG_OFFSET(UVD, i, mmUVD_POWER_STATUS), 0, in vcn_v2_5_start()
944 WREG32_P(SOC15_REG_OFFSET(UVD, i, mmUVD_POWER_STATUS), in vcn_v2_5_stop()
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| D | uvd_v7_0.c | 942 WREG32_P(SOC15_REG_OFFSET(UVD, k, mmUVD_POWER_STATUS), 0, in uvd_v7_0_start()
1734 WREG32_SOC15(UVD, ring->me, mmUVD_POWER_STATUS, UVD_POWER_STATUS__UVD_PG_EN_MASK);
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| /Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| D | uvd_4_0_d.h | 65 #define mmUVD_POWER_STATUS 0x38FC macro
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| D | uvd_4_2_d.h | 91 #define mmUVD_POWER_STATUS 0x38fc macro
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| D | uvd_5_0_d.h | 103 #define mmUVD_POWER_STATUS 0x38c4 macro
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| D | uvd_6_0_d.h | 119 #define mmUVD_POWER_STATUS 0x38c4 macro
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| D | uvd_7_0_offset.h | 28 #define mmUVD_POWER_STATUS … macro
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| /Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| D | vcn_1_0_offset.h | 32 #define mmUVD_POWER_STATUS … macro
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| D | vcn_2_5_offset.h | 387 #define mmUVD_POWER_STATUS … macro
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| D | vcn_2_0_0_offset.h | 384 #define mmUVD_POWER_STATUS … macro
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