Home
last modified time | relevance | path

Searched refs:mmUVD_MIF_REF_UV_ADDR_CONFIG (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h87 #define mmUVD_MIF_REF_UV_ADDR_CONFIG … macro
Dvcn_2_5_offset.h823 #define mmUVD_MIF_REF_UV_ADDR_CONFIG … macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dvcn_v1_0.c353 WREG32_SOC15(UVD, 0, mmUVD_MIF_REF_UV_ADDR_CONFIG, in vcn_v1_0_mc_resume_spg_mode()
429 WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_MIF_REF_UV_ADDR_CONFIG, in vcn_v1_0_mc_resume_dpg_mode()