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Searched refs:mmUVD_LMI_CTRL (Results 1 – 15 of 15) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_d.h47 #define mmUVD_LMI_CTRL 0x3D66 macro
Duvd_4_2_d.h49 #define mmUVD_LMI_CTRL 0x3d66 macro
Duvd_5_0_d.h55 #define mmUVD_LMI_CTRL 0x3d66 macro
Duvd_6_0_d.h71 #define mmUVD_LMI_CTRL 0x3d66 macro
Duvd_7_0_offset.h156 #define mmUVD_LMI_CTRL macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h336 #define mmUVD_LMI_CTRL macro
Dvcn_2_5_offset.h947 #define mmUVD_LMI_CTRL macro
Dvcn_2_0_0_offset.h562 #define mmUVD_LMI_CTRL macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dvcn_v1_0.c805 tmp = RREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL); in vcn_v1_0_start_spg_mode()
806 WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL, tmp | in vcn_v1_0_start_spg_mode()
1002 WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_LMI_CTRL, in vcn_v1_0_start_dpg_mode()
1057 WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_LMI_CTRL, in vcn_v1_0_start_dpg_mode()
Duvd_v4_2.c288 WREG32(mmUVD_LMI_CTRL, 0x203108); in uvd_v4_2_start()
Duvd_v5_0.c329 WREG32(mmUVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) | in uvd_v5_0_start()
Dvcn_v2_5.c746 tmp = RREG32_SOC15(UVD, i, mmUVD_LMI_CTRL); in vcn_v2_5_start()
748 WREG32_SOC15(UVD, i, mmUVD_LMI_CTRL, tmp | 0x8| in vcn_v2_5_start()
Dvcn_v2_0.c968 UVD, 0, mmUVD_LMI_CTRL), tmp, 0, indirect); in vcn_v2_0_start_dpg_mode()
1089 tmp = RREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL); in vcn_v2_0_start()
1090 WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL, tmp | in vcn_v2_0_start()
Duvd_v7_0.c868 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_LMI_CTRL), in uvd_v7_0_sriov_start()
983 WREG32_SOC15(UVD, k, mmUVD_LMI_CTRL, in uvd_v7_0_start()
Duvd_v6_0.c740 WREG32(mmUVD_LMI_CTRL, in uvd_v6_0_start()