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Searched refs:mmSRBM_SOFT_RESET (Results 1 – 25 of 26) sorted by relevance

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/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dcik_ih.c390 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
393 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset()
394 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
399 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset()
400 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
Dcz_ih.c369 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
372 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset()
373 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
378 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset()
379 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
Diceland_ih.c369 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
372 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset()
373 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
378 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset()
379 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
Dtonga_ih.c420 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
423 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset()
424 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
429 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset()
430 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
Dgmc_v6_0.c1035 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
1038 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset()
1039 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
1044 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset()
1045 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
Dvce_v3_0.c657 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
660 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset()
661 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
666 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset()
667 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
Dsdma_v2_4.c985 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
988 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset()
989 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
994 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset()
995 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
Dcik_sdma.c1092 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
1095 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset()
1096 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
1101 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset()
1102 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
Dgmc_v7_0.c1180 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
1183 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset()
1184 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
1189 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset()
1190 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
Dvce_v4_0.c749 tmp = RREG32(mmSRBM_SOFT_RESET);
752 WREG32(mmSRBM_SOFT_RESET, tmp);
753 tmp = RREG32(mmSRBM_SOFT_RESET);
758 WREG32(mmSRBM_SOFT_RESET, tmp);
759 tmp = RREG32(mmSRBM_SOFT_RESET);
Dsdma_v3_0.c1319 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
1322 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset()
1323 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
1328 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset()
1329 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
Duvd_v6_0.c1176 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
1179 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset()
1180 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
1185 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset()
1186 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
Dgmc_v8_0.c1343 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1346 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset()
1347 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1352 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset()
1353 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
Duvd_v4_2.c271 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v4_2_start()
654 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v4_2_soft_reset()
Duvd_v5_0.c325 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v5_0_start()
577 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v5_0_soft_reset()
Duvd_v7_0.c1499 tmp = RREG32(mmSRBM_SOFT_RESET);
1502 WREG32(mmSRBM_SOFT_RESET, tmp);
1503 tmp = RREG32(mmSRBM_SOFT_RESET);
1508 WREG32(mmSRBM_SOFT_RESET, tmp);
1509 tmp = RREG32(mmSRBM_SOFT_RESET);
Ddce_v8_0.c2822 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
2825 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset()
2826 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
2831 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset()
2832 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
Ddce_v10_0.c2934 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
2937 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset()
2938 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
2943 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset()
2944 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
Ddce_v11_0.c3060 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
3063 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset()
3064 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
3069 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset()
3070 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
Dgfx_v7_0.c4684 tmp = RREG32(mmSRBM_SOFT_RESET); in gfx_v7_0_soft_reset()
4687 WREG32(mmSRBM_SOFT_RESET, tmp); in gfx_v7_0_soft_reset()
4688 tmp = RREG32(mmSRBM_SOFT_RESET); in gfx_v7_0_soft_reset()
4693 WREG32(mmSRBM_SOFT_RESET, tmp); in gfx_v7_0_soft_reset()
4694 tmp = RREG32(mmSRBM_SOFT_RESET); in gfx_v7_0_soft_reset()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_1_0_d.h262 #define mmSRBM_SOFT_RESET 0x0398 macro
Doss_2_4_d.h83 #define mmSRBM_SOFT_RESET 0x398 macro
Doss_3_0_1_d.h81 #define mmSRBM_SOFT_RESET 0x398 macro
Doss_2_0_d.h77 #define mmSRBM_SOFT_RESET 0x398 macro
Doss_3_0_d.h93 #define mmSRBM_SOFT_RESET 0x398 macro

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