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Searched refs:mmSH_MEM_BASES (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v7.c256 WREG32(mmSH_MEM_BASES, sh_mem_bases); in kgd_program_sh_mem_settings()
Damdgpu_amdkfd_gfx_v8.c212 WREG32(mmSH_MEM_BASES, sh_mem_bases); in kgd_program_sh_mem_settings()
Damdgpu_amdkfd_gfx_v9.c142 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmSH_MEM_BASES), sh_mem_bases); in kgd_gfx_v9_program_sh_mem_settings()
Damdgpu_amdkfd_gfx_v10.c231 WREG32(SOC15_REG_OFFSET(GC, 0, mmSH_MEM_BASES), sh_mem_bases); in kgd_program_sh_mem_settings()
Dgfx_v9_0.c2471 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, sh_mem_bases); in gfx_v9_0_init_compute_vmid()
2529 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, 0); in gfx_v9_0_constants_init()
2540 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, tmp); in gfx_v9_0_constants_init()
Dgfx_v7_0.c1878 WREG32(mmSH_MEM_BASES, sh_mem_bases); in gfx_v7_0_init_compute_vmid()
1983 WREG32(mmSH_MEM_BASES, sh_mem_base); in gfx_v7_0_constants_init()
Dgfx_v8_0.c3738 WREG32(mmSH_MEM_BASES, sh_mem_bases); in gfx_v8_0_init_compute_vmid()
3819 WREG32(mmSH_MEM_BASES, 0); in gfx_v8_0_constants_init()
3827 WREG32(mmSH_MEM_BASES, tmp); in gfx_v8_0_constants_init()
Dgfx_v10_0.c1617 WREG32_SOC15(GC, 0, mmSH_MEM_BASES, sh_mem_bases); in gfx_v10_0_init_compute_vmid()
1759 WREG32_SOC15(GC, 0, mmSH_MEM_BASES, tmp); in gfx_v10_0_constants_init()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h1942 #define mmSH_MEM_BASES 0x230a macro
Dgfx_7_2_d.h1963 #define mmSH_MEM_BASES 0x230a macro
Dgfx_8_1_d.h2130 #define mmSH_MEM_BASES 0x230a macro
Dgfx_8_0_d.h2162 #define mmSH_MEM_BASES 0x230a macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h406 #define mmSH_MEM_BASES … macro
Dgc_9_1_offset.h400 #define mmSH_MEM_BASES … macro
Dgc_9_2_1_offset.h396 #define mmSH_MEM_BASES … macro
Dgc_10_1_0_offset.h2442 #define mmSH_MEM_BASES … macro