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Searched refs:mmSDMA0_POWER_CNTL (Results 1 – 13 of 13) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dcik_sdma.c909 orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET); in cik_enable_sdma_mgls()
912 WREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data); in cik_enable_sdma_mgls()
914 orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET); in cik_enable_sdma_mgls()
917 WREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET, data); in cik_enable_sdma_mgls()
919 orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET); in cik_enable_sdma_mgls()
922 WREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data); in cik_enable_sdma_mgls()
924 orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET); in cik_enable_sdma_mgls()
927 WREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET, data); in cik_enable_sdma_mgls()
Dsdma_v4_0.c93 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_POWER_CNTL, 0x003ff006, 0x0003c000),
135 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_POWER_CNTL, 0xfc3fffff, 0x40000051),
253 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_POWER_CNTL, 0x003fff07, 0x40000051),
1181 def = data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL)); in sdma_v4_1_init_power_gating()
1184 WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), data); in sdma_v4_1_init_power_gating()
1193 def = data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL)); in sdma_v4_1_init_power_gating()
1200 WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), data); in sdma_v4_1_init_power_gating()
2158 def = data = RREG32_SDMA(0, mmSDMA0_POWER_CNTL); in sdma_v4_0_update_medium_grain_light_sleep()
2161 WREG32_SDMA(0, mmSDMA0_POWER_CNTL, data); in sdma_v4_0_update_medium_grain_light_sleep()
2166 def = data = RREG32_SDMA(0, mmSDMA0_POWER_CNTL); in sdma_v4_0_update_medium_grain_light_sleep()
[all …]
Dsdma_v3_0.c151 mmSDMA0_POWER_CNTL, 0x00000800, 0x0003c800,
171 mmSDMA0_POWER_CNTL, 0x00000800, 0x0003c800,
1487 temp = data = RREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i]); in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1491 WREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i], data); in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1495 temp = data = RREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i]); in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1499 WREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i], data); in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1547 data = RREG32(mmSDMA0_POWER_CNTL + sdma_offsets[0]); in sdma_v3_0_get_clockgating_state()
Dsdma_v5_0.c1502 def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL)); in sdma_v5_0_update_medium_grain_light_sleep()
1505 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data); in sdma_v5_0_update_medium_grain_light_sleep()
1509 def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL)); in sdma_v5_0_update_medium_grain_light_sleep()
1512 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data); in sdma_v5_0_update_medium_grain_light_sleep()
1562 data = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_POWER_CNTL)); in sdma_v5_0_get_clockgating_state()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_offset.h64 #define mmSDMA0_POWER_CNTL … macro
Dsdma0_4_0_offset.h66 #define mmSDMA0_POWER_CNTL 0x001a macro
Dsdma0_4_2_2_offset.h66 #define mmSDMA0_POWER_CNTL … macro
Dsdma0_4_2_offset.h66 #define mmSDMA0_POWER_CNTL … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h159 #define mmSDMA0_POWER_CNTL 0x3402 macro
Doss_3_0_1_d.h156 #define mmSDMA0_POWER_CNTL 0x3402 macro
Doss_2_0_d.h221 #define mmSDMA0_POWER_CNTL 0x3402 macro
Doss_3_0_d.h293 #define mmSDMA0_POWER_CNTL 0x3402 macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h38 #define mmSDMA0_POWER_CNTL … macro