Home
last modified time | relevance | path

Searched refs:mmSDMA0_GFX_RB_BASE_HI (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_offset.h208 #define mmSDMA0_GFX_RB_BASE_HI … macro
Dsdma0_4_0_offset.h212 #define mmSDMA0_GFX_RB_BASE_HI 0x0082 macro
Dsdma0_4_2_2_offset.h212 #define mmSDMA0_GFX_RB_BASE_HI … macro
Dsdma0_4_2_offset.h208 #define mmSDMA0_GFX_RB_BASE_HI … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h189 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
Doss_3_0_1_d.h216 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
Doss_2_0_d.h248 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
Doss_3_0_d.h341 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dsdma_v2_4.c463 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in sdma_v2_4_gfx_resume()
Dcik_sdma.c485 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in cik_sdma_gfx_resume()
Dsdma_v3_0.c702 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in sdma_v3_0_gfx_resume()
Dsdma_v5_0.c661 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE_HI), ring->gpu_addr >> 40); in sdma_v5_0_gfx_resume()
Dsdma_v4_0.c1014 WREG32_SDMA(i, mmSDMA0_GFX_RB_BASE_HI, ring->gpu_addr >> 40); in sdma_v4_0_gfx_resume()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h203 #define mmSDMA0_GFX_RB_BASE_HI … macro