Searched refs:mmSDMA0_GFX_RB_BASE (Results 1 – 14 of 14) sorted by relevance
206 #define mmSDMA0_GFX_RB_BASE … macro
210 #define mmSDMA0_GFX_RB_BASE 0x0081 macro
210 #define mmSDMA0_GFX_RB_BASE … macro
188 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
215 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
247 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
340 #define mmSDMA0_GFX_RB_BASE 0x3481 macro
462 WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8); in sdma_v2_4_gfx_resume()
484 WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8); in cik_sdma_gfx_resume()
701 WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8); in sdma_v3_0_gfx_resume()
660 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE), ring->gpu_addr >> 8); in sdma_v5_0_gfx_resume()
1013 WREG32_SDMA(i, mmSDMA0_GFX_RB_BASE, ring->gpu_addr >> 8); in sdma_v4_0_gfx_resume()
201 #define mmSDMA0_GFX_RB_BASE … macro