Home
last modified time | relevance | path

Searched refs:mmSDMA0_GFX_IB_CNTL (Results 1 – 15 of 15) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dsdma_v3_0.c84 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
103 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
122 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
136 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
150 mmSDMA0_GFX_IB_CNTL, 0x00000100, 0x00000100,
170 mmSDMA0_GFX_IB_CNTL, 0x00000100, 0x00000100,
528 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_stop()
530 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_stop()
740 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v3_0_gfx_resume()
746 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v3_0_gfx_resume()
Dmxgpu_vi.c106 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
245 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
Dsdma_v2_4.c354 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_stop()
356 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_stop()
472 ib_cntl = RREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i]); in sdma_v2_4_gfx_resume()
478 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in sdma_v2_4_gfx_resume()
Dsdma_v4_0.c89 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_IB_CNTL, 0x800f0100, 0x00000100),
133 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100),
823 ib_cntl = RREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL); in sdma_v4_0_gfx_stop()
825 WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl); in sdma_v4_0_gfx_stop()
1053 ib_cntl = RREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL); in sdma_v4_0_gfx_resume()
1059 WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl); in sdma_v4_0_gfx_resume()
Dsdma_v5_0.c494 ib_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_stop()
496 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_stop()
727 ib_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_0_gfx_resume()
733 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_0_gfx_resume()
Dcik_sdma.c321 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], 0); in cik_sdma_gfx_stop()
499 WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl); in cik_sdma_gfx_resume()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_offset.h224 #define mmSDMA0_GFX_IB_CNTL … macro
Dsdma0_4_0_offset.h228 #define mmSDMA0_GFX_IB_CNTL 0x008a macro
Dsdma0_4_2_2_offset.h228 #define mmSDMA0_GFX_IB_CNTL … macro
Dsdma0_4_2_offset.h224 #define mmSDMA0_GFX_IB_CNTL … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h197 #define mmSDMA0_GFX_IB_CNTL 0x348a macro
Doss_3_0_1_d.h224 #define mmSDMA0_GFX_IB_CNTL 0x348a macro
Doss_2_0_d.h256 #define mmSDMA0_GFX_IB_CNTL 0x348a macro
Doss_3_0_d.h349 #define mmSDMA0_GFX_IB_CNTL 0x348a macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h219 #define mmSDMA0_GFX_IB_CNTL … macro