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Searched refs:mmSCRATCH_REG1_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dsoc15_common.h79 uint32_t r1 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG1; \
101 uint32_t r2 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG2; \
102 uint32_t r3 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG3; \
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h4617 #define mmSCRATCH_REG1_BASE_IDX macro
Dgc_9_1_offset.h4869 #define mmSCRATCH_REG1_BASE_IDX macro
Dgc_9_2_1_offset.h4825 #define mmSCRATCH_REG1_BASE_IDX macro
Dgc_10_1_0_offset.h7105 #define mmSCRATCH_REG1_BASE_IDX macro