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Searched refs:mmSCRATCH_REG0 (Results 1 – 15 of 15) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dsoc15_common.h78 uint32_t r0 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG0_BASE_IDX] + mmSCRATCH_REG0; \
Dgfx_v6_0.c1786 adev->gfx.scratch.reg_base = mmSCRATCH_REG0; in gfx_v6_0_scratch_init()
Dgfx_v7_0.c2072 adev->gfx.scratch.reg_base = mmSCRATCH_REG0; in gfx_v7_0_scratch_init()
Dgfx_v10_0.c396 adev->gfx.scratch.reg_base = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); in gfx_v10_0_scratch_init()
Dgfx_v9_0.c801 adev->gfx.scratch.reg_base = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); in gfx_v9_0_scratch_init()
Dgfx_v8_0.c832 adev->gfx.scratch.reg_base = mmSCRATCH_REG0; in gfx_v8_0_scratch_init()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1181 #define mmSCRATCH_REG0 0x2140 macro
Dgfx_7_0_d.h404 #define mmSCRATCH_REG0 0xc040 macro
Dgfx_7_2_d.h416 #define mmSCRATCH_REG0 0xc040 macro
Dgfx_8_1_d.h454 #define mmSCRATCH_REG0 0xc040 macro
Dgfx_8_0_d.h454 #define mmSCRATCH_REG0 0xc040 macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h4614 #define mmSCRATCH_REG0 … macro
Dgc_9_1_offset.h4866 #define mmSCRATCH_REG0 … macro
Dgc_9_2_1_offset.h4822 #define mmSCRATCH_REG0 … macro
Dgc_10_1_0_offset.h7102 #define mmSCRATCH_REG0 … macro