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Searched refs:mmRLC_SRM_INDEX_CNTL_DATA_0 (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c710 mmRLC_SRM_INDEX_CNTL_DATA_0 - mmRLC_SRM_INDEX_CNTL_DATA_0,
711 mmRLC_SRM_INDEX_CNTL_DATA_1 - mmRLC_SRM_INDEX_CNTL_DATA_0,
712 mmRLC_SRM_INDEX_CNTL_DATA_2 - mmRLC_SRM_INDEX_CNTL_DATA_0,
713 mmRLC_SRM_INDEX_CNTL_DATA_3 - mmRLC_SRM_INDEX_CNTL_DATA_0,
714 mmRLC_SRM_INDEX_CNTL_DATA_4 - mmRLC_SRM_INDEX_CNTL_DATA_0,
715 mmRLC_SRM_INDEX_CNTL_DATA_5 - mmRLC_SRM_INDEX_CNTL_DATA_0,
716 mmRLC_SRM_INDEX_CNTL_DATA_6 - mmRLC_SRM_INDEX_CNTL_DATA_0,
717 mmRLC_SRM_INDEX_CNTL_DATA_7 - mmRLC_SRM_INDEX_CNTL_DATA_0,
2743 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_INDEX_CNTL_DATA_0) in gfx_v9_1_init_rlc_save_restore_list()
Dgfx_v8_0.c4030 data = mmRLC_SRM_INDEX_CNTL_DATA_0; in gfx_v8_0_init_save_restore_list()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_1_d.h1467 #define mmRLC_SRM_INDEX_CNTL_DATA_0 0xec93 macro
Dgfx_8_0_d.h1471 #define mmRLC_SRM_INDEX_CNTL_DATA_0 0xec93 macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6148 #define mmRLC_SRM_INDEX_CNTL_DATA_0 … macro
Dgc_9_1_offset.h6392 #define mmRLC_SRM_INDEX_CNTL_DATA_0 … macro
Dgc_9_2_1_offset.h6368 #define mmRLC_SRM_INDEX_CNTL_DATA_0 … macro
Dgc_10_1_0_offset.h9478 #define mmRLC_SRM_INDEX_CNTL_DATA_0 … macro