Searched refs:mmRLC_SRM_CNTL (Results 1 – 9 of 9) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/ |
| D | polaris10_pwrvirus.h | 50 { 0x00000002, mmRLC_SRM_CNTL },
|
| /Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_8_1_d.h | 1448 #define mmRLC_SRM_CNTL 0xec80 macro
|
| D | gfx_8_0_d.h | 1452 #define mmRLC_SRM_CNTL 0xec80 macro
|
| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v10_0.c | 1865 tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL)); in gfx_v10_0_rlc_enable_srm() 1868 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL), tmp); in gfx_v10_0_rlc_enable_srm()
|
| D | gfx_v9_0.c | 2680 tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL)); in gfx_v9_1_init_rlc_save_restore_list() 2682 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL), tmp); in gfx_v9_1_init_rlc_save_restore_list()
|
| /Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 6114 #define mmRLC_SRM_CNTL … macro
|
| D | gc_9_1_offset.h | 6358 #define mmRLC_SRM_CNTL … macro
|
| D | gc_9_2_1_offset.h | 6334 #define mmRLC_SRM_CNTL … macro
|
| D | gc_10_1_0_offset.h | 9452 #define mmRLC_SRM_CNTL … macro
|