Searched refs:mmRLC_CP_SCHEDULERS (Results 1 – 12 of 12) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_amdkfd_gfx_v8.c | 308 value = RREG32(mmRLC_CP_SCHEDULERS); in kgd_hqd_load()
311 WREG32(mmRLC_CP_SCHEDULERS, value); in kgd_hqd_load()
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| D | amdgpu_amdkfd_gfx_v9.c | 282 value = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS)); in kgd_gfx_v9_hqd_load()
285 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS), value); in kgd_gfx_v9_hqd_load()
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| D | amdgpu_amdkfd_gfx_v10.c | 381 value = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS)); in kgd_hqd_load()
384 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS), value); in kgd_hqd_load()
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| D | gfx_v10_0.c | 2969 tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS); in gfx_v10_0_kiq_setting()
2972 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v10_0_kiq_setting()
2974 WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v10_0_kiq_setting()
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| D | gfx_v9_0.c | 3336 tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS); in gfx_v9_0_kiq_setting()
3339 WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v9_0_kiq_setting()
3341 WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v9_0_kiq_setting()
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| D | gfx_v8_0.c | 4367 tmp = RREG32(mmRLC_CP_SCHEDULERS); in gfx_v8_0_kiq_setting()
4370 WREG32(mmRLC_CP_SCHEDULERS, tmp); in gfx_v8_0_kiq_setting()
4372 WREG32(mmRLC_CP_SCHEDULERS, tmp); in gfx_v8_0_kiq_setting()
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| /Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_8_1_d.h | 1485 #define mmRLC_CP_SCHEDULERS 0xecaa macro
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| D | gfx_8_0_d.h | 1489 #define mmRLC_CP_SCHEDULERS 0xecaa macro
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| /Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 6176 #define mmRLC_CP_SCHEDULERS … macro
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| D | gc_9_1_offset.h | 6420 #define mmRLC_CP_SCHEDULERS … macro
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| D | gc_9_2_1_offset.h | 6396 #define mmRLC_CP_SCHEDULERS … macro
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| D | gc_10_1_0_offset.h | 9508 #define mmRLC_CP_SCHEDULERS … macro
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