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Searched refs:mmRLC_CGCG_CGLS_CTRL_3D (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c4119 def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v10_0_update_3d_clock_gating()
4126 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v10_0_update_3d_clock_gating()
4136 def = data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v10_0_update_3d_clock_gating()
4142 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v10_0_update_3d_clock_gating()
4309 data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v10_0_get_clockgating_state()
Dgfx_v9_0.c4711 def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v9_0_update_3d_clock_gating()
4719 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v9_0_update_3d_clock_gating()
4729 def = data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v9_0_update_3d_clock_gating()
4735 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v9_0_update_3d_clock_gating()
4942 data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v9_0_get_clockgating_state()
Dgfx_v8_0.c318 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
349 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
381 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_d.h1394 #define mmRLC_CGCG_CGLS_CTRL_3D 0xec9d macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6226 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
Dgc_9_1_offset.h6470 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
Dgc_9_2_1_offset.h6446 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
Dgc_10_1_0_offset.h9558 #define mmRLC_CGCG_CGLS_CTRL_3D … macro