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Searched refs:mmREGAMMA_CONTROL (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Ddce_v10_0.c2156 tmp = RREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset); in dce_v10_0_crtc_load_lut()
2159 WREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v10_0_crtc_load_lut()
Ddce_v11_0.c2191 tmp = RREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset); in dce_v11_0_crtc_load_lut()
2193 WREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v11_0_crtc_load_lut()
Ddce_v8_0.c2051 WREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset, in dce_v8_0_crtc_load_lut()
Ddce_v6_0.c2080 WREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset, in dce_v6_0_crtc_load_lut()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h4106 #define mmREGAMMA_CONTROL 0x1AA0 macro
Ddce_8_0_d.h2599 #define mmREGAMMA_CONTROL 0x1aa0 macro
Ddce_11_0_d.h3139 #define mmREGAMMA_CONTROL 0x1aa0 macro
Ddce_10_0_d.h3378 #define mmREGAMMA_CONTROL 0x1aa0 macro
Ddce_11_2_d.h4370 #define mmREGAMMA_CONTROL 0x1aa0 macro