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Searched refs:mmOTG1_OTG_H_TIMING_CNTL_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h8155 #define mmOTG1_OTG_H_TIMING_CNTL_BASE_IDX … macro
Ddcn_1_0_offset.h6500 #define mmOTG1_OTG_H_TIMING_CNTL_BASE_IDX … macro
Ddcn_2_0_0_offset.h9185 #define mmOTG1_OTG_H_TIMING_CNTL_BASE_IDX … macro