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Searched refs:mmMP0_SMN_C2PMSG_64 (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dpsp_v12_0.c184 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih()
187 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_reroute_ih()
196 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih()
199 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_reroute_ih()
278 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v12_0_ring_create()
284 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_ring_create()
302 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, in psp_v12_0_ring_stop()
313 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v12_0_ring_stop()
521 offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64); in psp_v12_0_mode1_reset()
Dpsp_v3_1.c276 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v3_1_reroute_ih()
279 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v3_1_reroute_ih()
288 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v3_1_reroute_ih()
291 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v3_1_reroute_ih()
345 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v3_1_ring_create()
352 mmMP0_SMN_C2PMSG_64), 0x80000000, in psp_v3_1_ring_create()
381 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v3_1_ring_stop()
388 SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v3_1_ring_stop()
608 offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64); in psp_v3_1_mode1_reset()
Dpsp_v10_0.c141 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v10_0_ring_create()
147 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v10_0_ring_create()
162 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v10_0_ring_stop()
168 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v10_0_ring_stop()
Dpsp_v11_0.c347 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v11_0_reroute_ih()
350 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v11_0_reroute_ih()
359 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v11_0_reroute_ih()
362 psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v11_0_reroute_ih()
441 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v11_0_ring_create()
447 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v11_0_ring_create()
465 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, in psp_v11_0_ring_stop()
476 ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64), in psp_v11_0_ring_stop()
694 offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64); in psp_v11_0_mode1_reset()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/mp/
Dmp_10_0_offset.h92 #define mmMP0_SMN_C2PMSG_64 … macro
Dmp_12_0_0_offset.h92 #define mmMP0_SMN_C2PMSG_64 … macro
Dmp_9_0_offset.h92 #define mmMP0_SMN_C2PMSG_64 0x0080 macro
Dmp_11_0_offset.h92 #define mmMP0_SMN_C2PMSG_64 … macro