Searched refs:mmHDMI_INFOFRAME_CONTROL0 (Results 1 – 9 of 9) sorted by relevance
1571 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v6_0_audio_hdmi_enable()1576 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v6_0_audio_hdmi_enable()1586 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v6_0_audio_hdmi_enable()1591 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v6_0_audio_hdmi_enable()
1622 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v10_0_afmt_setmode()1627 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v10_0_afmt_setmode()1706 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v10_0_afmt_setmode()1711 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v10_0_afmt_setmode()
1664 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v11_0_afmt_setmode()1669 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v11_0_afmt_setmode()1748 tmp = RREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset); in dce_v11_0_afmt_setmode()1753 WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp); in dce_v11_0_afmt_setmode()
1571 WREG32(mmHDMI_INFOFRAME_CONTROL0 + offset, in dce_v8_0_afmt_setmode()1640 WREG32_OR(mmHDMI_INFOFRAME_CONTROL0 + offset, in dce_v8_0_afmt_setmode()
3864 #define mmHDMI_INFOFRAME_CONTROL0 0x1C11 macro
2935 #define mmHDMI_INFOFRAME_CONTROL0 0x1c11 macro
3714 #define mmHDMI_INFOFRAME_CONTROL0 0x4a0e macro
3517 #define mmHDMI_INFOFRAME_CONTROL0 0x4a0e macro
4748 #define mmHDMI_INFOFRAME_CONTROL0 0x4a0e macro