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Searched refs:mmGDS_GWS_VMID0 (Results 1 – 12 of 12) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h2249 #define mmGDS_GWS_VMID0 0x3320 macro
Dgfx_7_2_d.h2271 #define mmGDS_GWS_VMID0 0x3320 macro
Dgfx_8_1_d.h2448 #define mmGDS_GWS_VMID0 0x3320 macro
Dgfx_8_0_d.h2469 #define mmGDS_GWS_VMID0 0x3320 macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c1627 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0); in gfx_v10_0_init_compute_vmid()
1645 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, vmid, 0); in gfx_v10_0_init_gds_vmid()
3967 SOC15_REG_OFFSET(GC, 0, mmGDS_GWS_VMID0) + vmid, in gfx_v10_0_ring_emit_gds_switch()
Dgfx_v9_0.c2481 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0); in gfx_v9_0_init_compute_vmid()
2499 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, vmid, 0); in gfx_v9_0_init_gds_vmid()
4115 SOC15_REG_OFFSET(GC, 0, mmGDS_GWS_VMID0) + vmid, in gfx_v9_0_ring_emit_gds_switch()
Dgfx_v7_0.c95 {mmGDS_VMID0_BASE, mmGDS_VMID0_SIZE, mmGDS_GWS_VMID0, mmGDS_OA_VMID0},
Dgfx_v8_0.c178 {mmGDS_VMID0_BASE, mmGDS_VMID0_SIZE, mmGDS_GWS_VMID0, mmGDS_OA_VMID0},
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h3080 #define mmGDS_GWS_VMID0 macro
Dgc_9_1_offset.h3332 #define mmGDS_GWS_VMID0 macro
Dgc_9_2_1_offset.h3282 #define mmGDS_GWS_VMID0 macro
Dgc_10_1_0_offset.h5584 #define mmGDS_GWS_VMID0 macro