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Searched refs:mmGC_EDC_CTRL (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dvega10_powertune.c742 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_EN_MASK, GC_EDC…
743 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_SW_RST_MASK, GC_EDC…
744 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, GC_EDC…
745 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_FORCE_STALL_MASK, GC_EDC…
746 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT_MASK, GC_EDC…
747 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA_MASK, GC_EDC…
758 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_EN_MASK, GC_EDC…
759 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_SW_RST_MASK, GC_EDC…
760 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, GC_EDC…
761 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_FORCE_STALL_MASK, GC_EDC…
[all …]
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2942 #define mmGC_EDC_CTRL … macro
Dgc_9_1_offset.h3194 #define mmGC_EDC_CTRL … macro
Dgc_9_2_1_offset.h3150 #define mmGC_EDC_CTRL … macro
Dgc_10_1_0_offset.h5446 #define mmGC_EDC_CTRL … macro