Home
last modified time | relevance | path

Searched refs:mmDP5_DP_MSA_TIMING_PARAM1_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h10008 #define mmDP5_DP_MSA_TIMING_PARAM1_BASE_IDX … macro
Ddcn_2_0_0_offset.h12691 #define mmDP5_DP_MSA_TIMING_PARAM1_BASE_IDX … macro