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Searched refs:mmDP1_DP_VID_TIMING_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h10191 #define mmDP1_DP_VID_TIMING_BASE_IDX … macro
Ddcn_1_0_offset.h8674 #define mmDP1_DP_VID_TIMING_BASE_IDX … macro
Ddcn_2_0_0_offset.h11285 #define mmDP1_DP_VID_TIMING_BASE_IDX … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h10495 #define mmDP1_DP_VID_TIMING_BASE_IDX … macro