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Searched refs:mmDCP_GSL_CONTROL (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_timing_generator.c1220 uint32_t address = DCP_REG(mmDCP_GSL_CONTROL); in dce110_timing_generator_setup_global_swap_lock()
1248 dm_write_reg(tg->ctx, CRTC_REG(mmDCP_GSL_CONTROL), value); in dce110_timing_generator_setup_global_swap_lock()
1321 uint32_t address = DCP_REG(mmDCP_GSL_CONTROL); in dce110_timing_generator_tear_down_global_swap_lock()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h2462 #define mmDCP_GSL_CONTROL 0x1A90 macro
Ddce_8_0_d.h2522 #define mmDCP_GSL_CONTROL 0x1a90 macro
Ddce_10_0_d.h3301 #define mmDCP_GSL_CONTROL 0x1a90 macro
Ddce_11_0_d.h3062 #define mmDCP_GSL_CONTROL 0x1a90 macro
Ddce_11_2_d.h4293 #define mmDCP_GSL_CONTROL 0x1a90 macro