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Searched refs:mmD3VGA_CONTROL (Results 1 – 15 of 15) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_timing_generator.c401 offset = mmD3VGA_CONTROL - mmD1VGA_CONTROL; in dce120_timing_generator_disable_vga()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_timing_generator.c1813 addr = mmD3VGA_CONTROL; in dce110_timing_generator_disable_vga()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h1043 #define mmD3VGA_CONTROL 0x00F8 macro
Ddce_8_0_d.h5146 #define mmD3VGA_CONTROL 0xf8 macro
Ddce_11_0_d.h6106 #define mmD3VGA_CONTROL 0xf8 macro
Ddce_10_0_d.h6029 #define mmD3VGA_CONTROL 0xf8 macro
Ddce_11_2_d.h7780 #define mmD3VGA_CONTROL 0xf8 macro
Ddce_12_0_offset.h640 #define mmD3VGA_CONTROL … macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c1726 mmD3VGA_CONTROL,
Ddce_v6_0.c1761 mmD3VGA_CONTROL,
Ddce_v10_0.c1797 mmD3VGA_CONTROL,
Ddce_v11_0.c1839 mmD3VGA_CONTROL,
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h138 #define mmD3VGA_CONTROL … macro
Ddcn_1_0_offset.h450 #define mmD3VGA_CONTROL … macro
Ddcn_2_0_0_offset.h118 #define mmD3VGA_CONTROL … macro