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Searched refs:mmCP_RB_WPTR_DELAY (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h521 #define mmCP_RB_WPTR_DELAY 0x21C1 macro
Dgfx_7_0_d.h512 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
Dgfx_7_2_d.h525 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
Dgfx_8_1_d.h578 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
Dgfx_8_0_d.h578 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c2102 WREG32(mmCP_RB_WPTR_DELAY, 0); in gfx_v6_0_cp_gfx_resume()
Dgfx_v7_0.c2612 WREG32(mmCP_RB_WPTR_DELAY, 0); in gfx_v7_0_cp_gfx_resume()
Dgfx_v10_0.c2779 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0); in gfx_v10_0_cp_gfx_resume()
Dgfx_v9_0.c3209 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0); in gfx_v9_0_cp_gfx_resume()
Dgfx_v8_0.c4299 WREG32(mmCP_RB_WPTR_DELAY, 0); in gfx_v8_0_cp_gfx_resume()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h210 #define mmCP_RB_WPTR_DELAY … macro
Dgc_9_1_offset.h210 #define mmCP_RB_WPTR_DELAY … macro
Dgc_9_2_1_offset.h204 #define mmCP_RB_WPTR_DELAY … macro
Dgc_10_1_0_offset.h2214 #define mmCP_RB_WPTR_DELAY … macro