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Searched refs:mmCP_RB1_WPTR_HI (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2403 #define mmCP_RB1_WPTR_HI … macro
Dgc_9_1_offset.h2702 #define mmCP_RB1_WPTR_HI … macro
Dgc_9_2_1_offset.h2640 #define mmCP_RB1_WPTR_HI … macro
Dgc_10_1_0_offset.h4768 #define mmCP_RB1_WPTR_HI … macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c2838 WREG32_SOC15(GC, 0, mmCP_RB1_WPTR_HI, upper_32_bits(ring->wptr)); in gfx_v10_0_cp_gfx_resume()