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Searched refs:mmCP_RB1_BASE_HI (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h199 #define mmCP_RB1_BASE_HI 0x30b2 macro
Dgfx_7_2_d.h199 #define mmCP_RB1_BASE_HI 0x30b2 macro
Dgfx_8_1_d.h224 #define mmCP_RB1_BASE_HI 0x30b2 macro
Dgfx_8_0_d.h223 #define mmCP_RB1_BASE_HI 0x30b2 macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2562 #define mmCP_RB1_BASE_HI … macro
Dgc_9_1_offset.h2854 #define mmCP_RB1_BASE_HI … macro
Dgc_9_2_1_offset.h2788 #define mmCP_RB1_BASE_HI … macro
Dgc_10_1_0_offset.h4922 #define mmCP_RB1_BASE_HI … macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c2855 WREG32_SOC15(GC, 0, mmCP_RB1_BASE_HI, upper_32_bits(rb_addr)); in gfx_v10_0_cp_gfx_resume()