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Searched refs:mmCP_INT_CNTL_RING2 (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c3270 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING2); in gfx_v6_0_set_compute_eop_interrupt_state()
3272 WREG32(mmCP_INT_CNTL_RING2, cp_int_cntl); in gfx_v6_0_set_compute_eop_interrupt_state()
3283 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING2); in gfx_v6_0_set_compute_eop_interrupt_state()
3285 WREG32(mmCP_INT_CNTL_RING2, cp_int_cntl); in gfx_v6_0_set_compute_eop_interrupt_state()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h440 #define mmCP_INT_CNTL_RING2 0x306C macro
Dgfx_7_0_d.h224 #define mmCP_INT_CNTL_RING2 0x306c macro
Dgfx_7_2_d.h224 #define mmCP_INT_CNTL_RING2 0x306c macro
Dgfx_8_1_d.h249 #define mmCP_INT_CNTL_RING2 0x306c macro
Dgfx_8_0_d.h248 #define mmCP_INT_CNTL_RING2 0x306c macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2445 #define mmCP_INT_CNTL_RING2 … macro
Dgc_9_1_offset.h2744 #define mmCP_INT_CNTL_RING2 … macro
Dgc_9_2_1_offset.h2682 #define mmCP_INT_CNTL_RING2 … macro
Dgc_10_1_0_offset.h4808 #define mmCP_INT_CNTL_RING2 … macro