Searched refs:mmCP_HQD_PQ_CONTROL (Results 1 – 13 of 13) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/ |
| D | polaris10_pwrvirus.h | 1513 { 0xc8318509, mmCP_HQD_PQ_CONTROL },
1523 { 0xc8318509, mmCP_HQD_PQ_CONTROL },
1533 { 0xc8318509, mmCP_HQD_PQ_CONTROL },
1543 { 0xc8318509, mmCP_HQD_PQ_CONTROL },
|
| /Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_7_0_d.h | 584 #define mmCP_HQD_PQ_CONTROL 0x3256 macro
|
| D | gfx_7_2_d.h | 597 #define mmCP_HQD_PQ_CONTROL 0x3256 macro
|
| D | gfx_8_1_d.h | 647 #define mmCP_HQD_PQ_CONTROL 0x3256 macro
|
| D | gfx_8_0_d.h | 647 #define mmCP_HQD_PQ_CONTROL 0x3256 macro
|
| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v10_0.c | 3286 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL); in gfx_v10_0_compute_mqd_init()
3408 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL, in gfx_v10_0_kiq_init_register()
|
| D | gfx_v9_0.c | 3490 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL); in gfx_v9_0_mqd_init()
3611 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_CONTROL, in gfx_v9_0_kiq_init_register()
|
| D | gfx_v7_0.c | 2967 mqd->cp_hqd_pq_control = RREG32(mmCP_HQD_PQ_CONTROL); in gfx_v7_0_mqd_init()
|
| D | gfx_v8_0.c | 4509 tmp = RREG32(mmCP_HQD_PQ_CONTROL); in gfx_v8_0_mqd_init()
|
| /Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 2824 #define mmCP_HQD_PQ_CONTROL … macro
|
| D | gc_9_2_1_offset.h | 3030 #define mmCP_HQD_PQ_CONTROL … macro
|
| D | gc_9_1_offset.h | 3074 #define mmCP_HQD_PQ_CONTROL … macro
|
| D | gc_10_1_0_offset.h | 5312 #define mmCP_HQD_PQ_CONTROL … macro
|
