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Searched refs:mmCP_HQD_HQ_SCHEDULER1 (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h600 #define mmCP_HQD_HQ_SCHEDULER1 0x3266 macro
Dgfx_7_2_d.h613 #define mmCP_HQD_HQ_SCHEDULER1 0x3266 macro
Dgfx_8_1_d.h665 #define mmCP_HQD_HQ_SCHEDULER1 0x3266 macro
Dgfx_8_0_d.h665 #define mmCP_HQD_HQ_SCHEDULER1 0x3266 macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2862 #define mmCP_HQD_HQ_SCHEDULER1 … macro
Dgc_9_1_offset.h3112 #define mmCP_HQD_HQ_SCHEDULER1 … macro
Dgc_9_2_1_offset.h3068 #define mmCP_HQD_HQ_SCHEDULER1 … macro
Dgc_10_1_0_offset.h5350 #define mmCP_HQD_HQ_SCHEDULER1 … macro