Home
last modified time | relevance | path

Searched refs:mmCP_HQD_EOP_BASE_ADDR_HI (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_1_d.h671 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x326b macro
Dgfx_8_0_d.h671 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x326b macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2872 #define mmCP_HQD_EOP_BASE_ADDR_HI macro
Dgc_9_1_offset.h3122 #define mmCP_HQD_EOP_BASE_ADDR_HI macro
Dgc_9_2_1_offset.h3078 #define mmCP_HQD_EOP_BASE_ADDR_HI macro
Dgc_10_1_0_offset.h5360 #define mmCP_HQD_EOP_BASE_ADDR_HI macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c3362 WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI, in gfx_v10_0_kiq_init_register()
Dgfx_v9_0.c3565 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI, in gfx_v9_0_kiq_init_register()