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Searched refs:mmCP_HQD_ACTIVE (Results 1 – 17 of 17) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/
Dpolaris10_pwrvirus.h1545 { 0x00000000, mmCP_HQD_ACTIVE },
1548 { 0x00000001, mmCP_HQD_ACTIVE },
1550 { 0x00000000, mmCP_HQD_ACTIVE },
1553 { 0x00000001, mmCP_HQD_ACTIVE },
1555 { 0x00000000, mmCP_HQD_ACTIVE },
1558 { 0x00000001, mmCP_HQD_ACTIVE },
1560 { 0x00000000, mmCP_HQD_ACTIVE },
1563 { 0x00000001, mmCP_HQD_ACTIVE },
1565 { 0x00000000, mmCP_HQD_ACTIVE },
1568 { 0x00000001, mmCP_HQD_ACTIVE },
[all …]
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v7.c367 WREG32(mmCP_HQD_ACTIVE, data); in kgd_hqd_load()
510 act = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_is_occupied()
628 temp = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_destroy()
Damdgpu_amdkfd_gfx_v8.c352 WREG32(mmCP_HQD_ACTIVE, data); in kgd_hqd_load()
503 act = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_is_occupied()
624 temp = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_destroy()
Damdgpu_amdkfd_gfx_v9.c347 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE), data); in kgd_gfx_v9_hqd_load()
500 act = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_gfx_v9_hqd_is_occupied()
567 temp = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_gfx_v9_hqd_destroy()
Damdgpu_amdkfd_gfx_v10.c447 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE), data); in kgd_hqd_load()
604 act = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_hqd_is_occupied()
729 temp = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_hqd_destroy()
Dgfx_v9_0.c3577 if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) { in gfx_v9_0_kiq_init_register()
3580 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v9_0_kiq_init_register()
3650 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, in gfx_v9_0_kiq_init_register()
3665 if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) { in gfx_v9_0_kiq_fini_register()
3670 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v9_0_kiq_fini_register()
3679 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, 0); in gfx_v9_0_kiq_fini_register()
Dgfx_v7_0.c2909 if (RREG32(mmCP_HQD_ACTIVE) & 1) { in gfx_v7_0_mqd_deactivate()
2912 if (!(RREG32(mmCP_HQD_ACTIVE) & 1)) in gfx_v7_0_mqd_deactivate()
3067 for (mqd_reg = mmCP_MQD_BASE_ADDR; mqd_reg <= mmCP_HQD_ACTIVE; mqd_reg++) in gfx_v7_0_mqd_commit()
Dgfx_v10_0.c3374 if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) { in gfx_v10_0_kiq_init_register()
3377 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v10_0_kiq_init_register()
3447 WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, in gfx_v10_0_kiq_init_register()
Dgfx_v8_0.c4440 if (RREG32(mmCP_HQD_ACTIVE) & CP_HQD_ACTIVE__ACTIVE_MASK) { in gfx_v8_0_deactivate_hqd()
4443 if (!(RREG32(mmCP_HQD_ACTIVE) & CP_HQD_ACTIVE__ACTIVE_MASK)) in gfx_v8_0_deactivate_hqd()
4631 for (mqd_reg = mmCP_MQD_BASE_ADDR; mqd_reg <= mmCP_HQD_ACTIVE; mqd_reg++) in gfx_v8_0_mqd_commit()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h569 #define mmCP_HQD_ACTIVE 0x3247 macro
Dgfx_7_2_d.h582 #define mmCP_HQD_ACTIVE 0x3247 macro
Dgfx_8_1_d.h632 #define mmCP_HQD_ACTIVE 0x3247 macro
Dgfx_8_0_d.h632 #define mmCP_HQD_ACTIVE 0x3247 macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2796 #define mmCP_HQD_ACTIVE macro
Dgc_9_1_offset.h3046 #define mmCP_HQD_ACTIVE macro
Dgc_9_2_1_offset.h3002 #define mmCP_HQD_ACTIVE macro
Dgc_10_1_0_offset.h5284 #define mmCP_HQD_ACTIVE macro