Home
last modified time | relevance | path

Searched refs:mmCP_CE_IC_OP_CNTL (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c2257 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_ce_cache()
2259 WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp); in gfx_v10_0_rlc_backdoor_autoload_config_ce_cache()
2263 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_ce_cache()
2524 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL); in gfx_v10_0_cp_gfx_load_ce_microcode()
2526 WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp); in gfx_v10_0_cp_gfx_load_ce_microcode()
2530 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL); in gfx_v10_0_cp_gfx_load_ce_microcode()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h10254 #define mmCP_CE_IC_OP_CNTL macro