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Searched refs:mmCP_CE_IC_BASE_CNTL (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h10252 #define mmCP_CE_IC_BASE_CNTL … macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c2545 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_CNTL); in gfx_v10_0_cp_gfx_load_ce_microcode()