Home
last modified time | relevance | path

Searched refs:mmCNVC_CFG0_FORMAT_CONTROL_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h3321 #define mmCNVC_CFG0_FORMAT_CONTROL_BASE_IDX … macro
Ddcn_1_0_offset.h3479 #define mmCNVC_CFG0_FORMAT_CONTROL_BASE_IDX … macro
Ddcn_2_0_0_offset.h4259 #define mmCNVC_CFG0_FORMAT_CONTROL_BASE_IDX … macro