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Searched refs:mmBL_PWM_CNTL2 (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h476 #define mmBL_PWM_CNTL2 0x191F macro
Ddce_8_0_d.h1287 #define mmBL_PWM_CNTL2 0x191f macro
Ddce_11_0_d.h1399 #define mmBL_PWM_CNTL2 0x4821 macro
Ddce_10_0_d.h1574 #define mmBL_PWM_CNTL2 0x4821 macro
Ddce_11_2_d.h1479 #define mmBL_PWM_CNTL2 0x4821 macro
Ddce_12_0_offset.h1862 #define mmBL_PWM_CNTL2 … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h11350 #define mmBL_PWM_CNTL2 … macro
Ddcn_1_0_offset.h10405 #define mmBL_PWM_CNTL2 … macro
Ddcn_2_0_0_offset.h12776 #define mmBL_PWM_CNTL2 … macro