Home
last modified time | relevance | path

Searched refs:mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h429 #define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL 0x17D6 macro
Ddce_8_0_d.h5277 #define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL 0x17d6 macro
Ddce_11_0_d.h6671 #define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL 0x182b macro
Ddce_10_0_d.h6509 #define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL 0x182b macro
Ddce_11_2_d.h8016 #define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL 0x182b macro
Ddce_12_0_offset.h1548 #define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h1480 #define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL … macro
Ddcn_1_0_offset.h1874 #define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL … macro
Ddcn_2_0_0_offset.h1518 #define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL … macro