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Searched refs:misc_base (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/arch/arm/mach-spear/
Dgeneric.h31 void __init spear3xx_clk_init(void __iomem *misc_base,
35 void __init spear6xx_clk_init(void __iomem *misc_base);
47 void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base);
49 static inline void spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base) {} in spear1310_clk_init() argument
53 void __init spear1340_clk_init(void __iomem *misc_base);
55 static inline void spear1340_clk_init(void __iomem *misc_base) {} in spear1340_clk_init() argument
/Linux-v5.4/drivers/clk/spear/
Dspear6xx_clock.c19 #define PLL1_CTR (misc_base + 0x008)
20 #define PLL1_FRQ (misc_base + 0x00C)
21 #define PLL2_CTR (misc_base + 0x014)
22 #define PLL2_FRQ (misc_base + 0x018)
23 #define PLL_CLK_CFG (misc_base + 0x020)
28 #define CORE_CLK_CFG (misc_base + 0x024)
35 #define PERIP_CLK_CFG (misc_base + 0x028)
49 #define PERIP1_CLK_ENB (misc_base + 0x02C)
75 #define PRSC0_CLK_CFG (misc_base + 0x044)
76 #define PRSC1_CLK_CFG (misc_base + 0x048)
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Dspear1340_clock.c22 #define SPEAR1340_SYS_CLK_CTRL (misc_base + 0x200)
29 #define SPEAR1340_PLL_CFG (misc_base + 0x210)
41 #define SPEAR1340_PLL1_CTR (misc_base + 0x214)
42 #define SPEAR1340_PLL1_FRQ (misc_base + 0x218)
43 #define SPEAR1340_PLL2_CTR (misc_base + 0x220)
44 #define SPEAR1340_PLL2_FRQ (misc_base + 0x224)
45 #define SPEAR1340_PLL3_CTR (misc_base + 0x22C)
46 #define SPEAR1340_PLL3_FRQ (misc_base + 0x230)
47 #define SPEAR1340_PLL4_CTR (misc_base + 0x238)
48 #define SPEAR1340_PLL4_FRQ (misc_base + 0x23C)
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Dspear3xx_clock.c22 #define PLL1_CTR (misc_base + 0x008)
23 #define PLL1_FRQ (misc_base + 0x00C)
24 #define PLL2_CTR (misc_base + 0x014)
25 #define PLL2_FRQ (misc_base + 0x018)
26 #define PLL_CLK_CFG (misc_base + 0x020)
31 #define CORE_CLK_CFG (misc_base + 0x024)
41 #define PERIP_CLK_CFG (misc_base + 0x028)
52 #define PERIP1_CLK_ENB (misc_base + 0x02C)
71 #define RAS_CLK_ENB (misc_base + 0x034)
84 #define PRSC0_CLK_CFG (misc_base + 0x044)
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Dspear1310_clock.c22 #define SPEAR1310_PLL_CFG (misc_base + 0x210)
35 #define SPEAR1310_PLL1_CTR (misc_base + 0x214)
36 #define SPEAR1310_PLL1_FRQ (misc_base + 0x218)
37 #define SPEAR1310_PLL2_CTR (misc_base + 0x220)
38 #define SPEAR1310_PLL2_FRQ (misc_base + 0x224)
39 #define SPEAR1310_PLL3_CTR (misc_base + 0x22C)
40 #define SPEAR1310_PLL3_FRQ (misc_base + 0x230)
41 #define SPEAR1310_PLL4_CTR (misc_base + 0x238)
42 #define SPEAR1310_PLL4_FRQ (misc_base + 0x23C)
43 #define SPEAR1310_PERIP_CLK_CFG (misc_base + 0x244)
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