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Searched refs:mg_pll_div1 (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_dpll_mgr.h205 u32 mg_pll_div1; member
Dintel_dpll_mgr.c2808 pll_state->mg_pll_div1 = MG_PLL_DIV1_IREF_NDIVRATIO(iref_ndiv) | in icl_calc_mg_pll_state()
3078 hw_state->mg_pll_div1 = I915_READ(MG_PLL_DIV1(tc_port)); in mg_pll_get_hw_state()
3220 I915_WRITE(MG_PLL_DIV1(tc_port), hw_state->mg_pll_div1); in icl_mg_pll_write()
3426 hw_state->mg_pll_div1, in icl_dump_hw_state()
Dintel_ddi.c1416 m1 = pll_state->mg_pll_div1 & MG_PLL_DIV1_FBPREDIV_MASK; in icl_calc_mg_pll_link()
Dintel_display.c12820 PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div1); in intel_pipe_config_compare()
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_debugfs.c2856 pll->state.hw_state.mg_pll_div1); in i915_shared_dplls_info()